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Commit cc890cd7 authored by Linus Walleij's avatar Linus Walleij Committed by Russell King
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ARM: 7083/1: rewrite U300 GPIO to use gpiolib 



This rewrites the U300 GPIO so as to use gpiolib and
struct gpio_chip instead of just generic GPIO, hiding
all the platform specifics and passing in GPIO chip
variant as platform data at runtime instead of the
compiletime kludges.

As a result <mach/gpio.h> is now empty for U300 and
using just defaults.

Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Debian kernel maintainers <debian-kernel@lists.debian.org>
Cc: Arnaud Patard <arnaud.patard@rtp-net.org>
Reported-by: default avatarBen Hutchings <ben@decadent.org.uk>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 526a0dc7

arch/arm/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -836,6 +836,7 @@ config ARCH_U300 
	select CLKDEV_LOOKUP

	select HAVE_MACH_CLKDEV

	select GENERIC_GPIO

	select ARCH_REQUIRE_GPIOLIB

	help

	  Support for ST-Ericsson U300 series mobile platforms.

arch/arm/mach-u300/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ comment "ST-Ericsson Mobile Platform Products" 


config MACH_U300

	bool "U300"

	select GPIO_U300



comment "ST-Ericsson U300/U330/U335/U365 Feature Selections"

arch/arm/mach-u300/core.c

+28 −3
Original line number Diff line number Diff line
@@ -37,6 +37,7 @@ 
#include <mach/hardware.h>

#include <mach/syscon.h>

#include <mach/dma_channels.h>

#include <mach/gpio-u300.h>



#include "clock.h"

#include "mmc.h"
@@ -239,7 +240,7 @@ static struct resource gpio_resources[] = { 
		.end   = IRQ_U300_GPIO_PORT2,

		.flags = IORESOURCE_IRQ,

	},

#ifdef U300_COH901571_3

#if defined(CONFIG_MACH_U300_BS365) || defined(CONFIG_MACH_U300_BS335)

	{

		.name  = "gpio3",

		.start = IRQ_U300_GPIO_PORT3,
@@ -252,6 +253,7 @@ static struct resource gpio_resources[] = { 
		.end   = IRQ_U300_GPIO_PORT4,

		.flags = IORESOURCE_IRQ,

	},

#endif

#ifdef CONFIG_MACH_U300_BS335

	{

		.name  = "gpio5",
@@ -266,7 +268,6 @@ static struct resource gpio_resources[] = { 
		.flags = IORESOURCE_IRQ,

	},

#endif /* CONFIG_MACH_U300_BS335 */

#endif /* U300_COH901571_3 */

};



static struct resource keypad_resources[] = {
@@ -1556,11 +1557,35 @@ static struct platform_device i2c1_device = { 
	.resource = i2c1_resources,

};



/*

 * The different variants have a few different versions of the

 * GPIO block, with different number of ports.

 */

static struct u300_gpio_platform u300_gpio_plat = {

#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330)

	.variant = U300_GPIO_COH901335,

	.ports = 3,

#endif

#ifdef CONFIG_MACH_U300_BS335

	.variant = U300_GPIO_COH901571_3_BS335,

	.ports = 7,

#endif

#ifdef CONFIG_MACH_U300_BS365

	.variant = U300_GPIO_COH901571_3_BS365,

	.ports = 5,

#endif

	.gpio_base = 0,

	.gpio_irq_base = IRQ_U300_GPIO_BASE,

};



static struct platform_device gpio_device = {

	.name = "u300-gpio",

	.id = -1,

	.num_resources = ARRAY_SIZE(gpio_resources),

	.resource = gpio_resources,

	.dev = {

		.platform_data = &u300_gpio_plat,

	},

};



static struct platform_device keypad_device = {
@@ -1666,7 +1691,7 @@ void __init u300_init_irq(void) 
	BUG_ON(IS_ERR(clk));

	clk_enable(clk);



	for (i = 0; i < NR_IRQS; i++)

	for (i = 0; i < U300_VIC_IRQS_END; i++)

		set_bit(i, (unsigned long *) &mask[0]);

	vic_init((void __iomem *) U300_INTCON0_VBASE, 0, mask[0], mask[0]);

	vic_init((void __iomem *) U300_INTCON1_VBASE, 32, mask[1], mask[1]);

arch/arm/mach-u300/include/mach/gpio-u300.h

+23 −126
Original line number Diff line number Diff line
@@ -9,132 +9,6 @@ 
#ifndef __MACH_U300_GPIO_U300_H

#define __MACH_U300_GPIO_U300_H



#include <linux/kernel.h>

#include <linux/io.h>

#include <mach/hardware.h>

#include <asm/irq.h>



/* Switch type depending on platform/chip variant */

#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330)

#define U300_COH901335

#endif

#if defined(CONFIG_MACH_U300_BS365) || defined(CONFIG_MACH_U300_BS335)

#define U300_COH901571_3

#endif



/* Get base address for regs here */

#include "u300-regs.h"

/* IRQ numbers */

#include "irqs.h"



/*

 * This is the GPIO block definitions. GPIO (General Purpose I/O) can be

 * used for anything, and often is. The event/enable etc figures are for

 * the lowermost pin (pin 0 on each port), shift this left to match your

 * pin if you're gonna use these values.

 */

#ifdef U300_COH901335

#define U300_GPIO_PORTX_SPACING				(0x1C)

/* Port X Pin Data Register 32bit, this is both input and output (R/W) */

#define U300_GPIO_PXPDIR				(0x00)

#define U300_GPIO_PXPDOR				(0x00)

/* Port X Pin Config Register 32bit (R/W) */

#define U300_GPIO_PXPCR					(0x04)

#define U300_GPIO_PXPCR_ALL_PINS_MODE_MASK		(0x0000FFFFUL)

#define U300_GPIO_PXPCR_PIN_MODE_MASK			(0x00000003UL)

#define U300_GPIO_PXPCR_PIN_MODE_SHIFT			(0x00000002UL)

#define U300_GPIO_PXPCR_PIN_MODE_INPUT			(0x00000000UL)

#define U300_GPIO_PXPCR_PIN_MODE_OUTPUT_PUSH_PULL	(0x00000001UL)

#define U300_GPIO_PXPCR_PIN_MODE_OUTPUT_OPEN_DRAIN	(0x00000002UL)

#define U300_GPIO_PXPCR_PIN_MODE_OUTPUT_OPEN_SOURCE	(0x00000003UL)

/* Port X Interrupt Event Register 32bit (R/W) */

#define U300_GPIO_PXIEV					(0x08)

#define U300_GPIO_PXIEV_ALL_IRQ_EVENT_MASK		(0x000000FFUL)

#define U300_GPIO_PXIEV_IRQ_EVENT			(0x00000001UL)

/* Port X Interrupt Enable Register 32bit (R/W) */

#define U300_GPIO_PXIEN					(0x0C)

#define U300_GPIO_PXIEN_ALL_IRQ_ENABLE_MASK		(0x000000FFUL)

#define U300_GPIO_PXIEN_IRQ_ENABLE			(0x00000001UL)

/* Port X Interrupt Force Register 32bit (R/W) */

#define U300_GPIO_PXIFR					(0x10)

#define U300_GPIO_PXIFR_ALL_IRQ_FORCE_MASK		(0x000000FFUL)

#define U300_GPIO_PXIFR_IRQ_FORCE			(0x00000001UL)

/* Port X Interrupt Config Register 32bit (R/W) */

#define U300_GPIO_PXICR					(0x14)

#define U300_GPIO_PXICR_ALL_IRQ_CONFIG_MASK		(0x000000FFUL)

#define U300_GPIO_PXICR_IRQ_CONFIG_MASK			(0x00000001UL)

#define U300_GPIO_PXICR_IRQ_CONFIG_FALLING_EDGE		(0x00000000UL)

#define U300_GPIO_PXICR_IRQ_CONFIG_RISING_EDGE		(0x00000001UL)

/* Port X Pull-up Enable Register 32bit (R/W) */

#define U300_GPIO_PXPER					(0x18)

#define U300_GPIO_PXPER_ALL_PULL_UP_DISABLE_MASK	(0x000000FFUL)

#define U300_GPIO_PXPER_PULL_UP_DISABLE			(0x00000001UL)

/* Control Register 32bit (R/W) */

#define U300_GPIO_CR					(0x54)

#define U300_GPIO_CR_BLOCK_CLOCK_ENABLE			(0x00000001UL)

/* three ports of 8 bits each = GPIO pins 0..23 */

#define U300_GPIO_NUM_PORTS 3

#define U300_GPIO_PINS_PER_PORT 8

#define U300_GPIO_MAX	(U300_GPIO_PINS_PER_PORT * U300_GPIO_NUM_PORTS - 1)

#endif



#ifdef U300_COH901571_3

/*

 * Control Register 32bit (R/W)

 * bit 15-9 (mask 0x0000FE00) contains the number of cores. 8*cores

 * gives the number of GPIO pins.

 * bit 8-2  (mask 0x000001FC) contains the core version ID.

 */

#define U300_GPIO_CR					(0x00)

#define U300_GPIO_CR_SYNC_SEL_ENABLE			(0x00000002UL)

#define U300_GPIO_CR_BLOCK_CLKRQ_ENABLE			(0x00000001UL)

#define U300_GPIO_PORTX_SPACING				(0x30)

/* Port X Pin Data INPUT Register 32bit (R/W) */

#define U300_GPIO_PXPDIR				(0x04)

/* Port X Pin Data OUTPUT Register 32bit (R/W) */

#define U300_GPIO_PXPDOR				(0x08)

/* Port X Pin Config Register 32bit (R/W) */

#define U300_GPIO_PXPCR					(0x0C)

#define U300_GPIO_PXPCR_ALL_PINS_MODE_MASK		(0x0000FFFFUL)

#define U300_GPIO_PXPCR_PIN_MODE_MASK			(0x00000003UL)

#define U300_GPIO_PXPCR_PIN_MODE_SHIFT			(0x00000002UL)

#define U300_GPIO_PXPCR_PIN_MODE_INPUT			(0x00000000UL)

#define U300_GPIO_PXPCR_PIN_MODE_OUTPUT_PUSH_PULL	(0x00000001UL)

#define U300_GPIO_PXPCR_PIN_MODE_OUTPUT_OPEN_DRAIN	(0x00000002UL)

#define U300_GPIO_PXPCR_PIN_MODE_OUTPUT_OPEN_SOURCE	(0x00000003UL)

/* Port X Pull-up Enable Register 32bit (R/W) */

#define U300_GPIO_PXPER					(0x10)

#define U300_GPIO_PXPER_ALL_PULL_UP_DISABLE_MASK	(0x000000FFUL)

#define U300_GPIO_PXPER_PULL_UP_DISABLE			(0x00000001UL)

/* Port X Interrupt Event Register 32bit (R/W) */

#define U300_GPIO_PXIEV					(0x14)

#define U300_GPIO_PXIEV_ALL_IRQ_EVENT_MASK		(0x000000FFUL)

#define U300_GPIO_PXIEV_IRQ_EVENT			(0x00000001UL)

/* Port X Interrupt Enable Register 32bit (R/W) */

#define U300_GPIO_PXIEN					(0x18)

#define U300_GPIO_PXIEN_ALL_IRQ_ENABLE_MASK		(0x000000FFUL)

#define U300_GPIO_PXIEN_IRQ_ENABLE			(0x00000001UL)

/* Port X Interrupt Force Register 32bit (R/W) */

#define U300_GPIO_PXIFR					(0x1C)

#define U300_GPIO_PXIFR_ALL_IRQ_FORCE_MASK		(0x000000FFUL)

#define U300_GPIO_PXIFR_IRQ_FORCE			(0x00000001UL)

/* Port X Interrupt Config Register 32bit (R/W) */

#define U300_GPIO_PXICR					(0x20)

#define U300_GPIO_PXICR_ALL_IRQ_CONFIG_MASK		(0x000000FFUL)

#define U300_GPIO_PXICR_IRQ_CONFIG_MASK			(0x00000001UL)

#define U300_GPIO_PXICR_IRQ_CONFIG_FALLING_EDGE		(0x00000000UL)

#define U300_GPIO_PXICR_IRQ_CONFIG_RISING_EDGE		(0x00000001UL)

#ifdef CONFIG_MACH_U300_BS335

/* seven ports of 8 bits each = GPIO pins 0..55 */

#define U300_GPIO_NUM_PORTS 7

#else

/* five ports of 8 bits each = GPIO pins 0..39 */

#define U300_GPIO_NUM_PORTS 5

#endif

#define U300_GPIO_PINS_PER_PORT 8

#define U300_GPIO_MAX (U300_GPIO_PINS_PER_PORT * U300_GPIO_NUM_PORTS - 1)

#endif



/*

 * Individual pin assignments for the B26/S26. Notice that the

 * actual usage of these pins depends on the PAD MUX settings, that
@@ -250,4 +124,27 @@ 


#endif



/**

 * enum u300_gpio_variant - the type of U300 GPIO employed

 */

enum u300_gpio_variant {

	U300_GPIO_COH901335,

	U300_GPIO_COH901571_3_BS335,

	U300_GPIO_COH901571_3_BS365,

};



/**

 * struct u300_gpio_platform - U300 GPIO platform data

 * @variant: IP block variant

 * @ports: number of GPIO block ports

 * @gpio_base: first GPIO number for this block (use a free range)

 * @gpio_irq_base: first GPIO IRQ number for this block (use a free range)

 */

struct u300_gpio_platform {

	enum u300_gpio_variant variant;

	u8 ports;

	int gpio_base;

	int gpio_irq_base;

};



#endif /* __MACH_U300_GPIO_U300_H */

arch/arm/mach-u300/include/mach/gpio.h

+0 −47
Original line number Diff line number Diff line 
/*

 *

 * arch/arm/mach-u300/include/mach/gpio.h

 *

 *

 * Copyright (C) 2007-2009 ST-Ericsson AB

 * License terms: GNU General Public License (GPL) version 2

 * GPIO block resgister definitions and inline macros for

 * U300 GPIO COH 901 335 or COH 901 571/3

 * Author: Linus Walleij <linus.walleij@stericsson.com>

 */



#ifndef __MACH_U300_GPIO_H

#define __MACH_U300_GPIO_H



#define __ARM_GPIOLIB_COMPLEX



/* These can be found in arch/arm/mach-u300/gpio.c */

extern int gpio_is_valid(int number);

extern int gpio_request(unsigned gpio, const char *label);

extern void gpio_free(unsigned gpio);

extern int gpio_direction_input(unsigned gpio);

extern int gpio_direction_output(unsigned gpio, int value);

extern int gpio_register_callback(unsigned gpio,

				  int (*func)(void *arg),

				  void *);

extern int gpio_unregister_callback(unsigned gpio);

extern void enable_irq_on_gpio_pin(unsigned gpio, int edge);

extern void disable_irq_on_gpio_pin(unsigned gpio);

extern void gpio_pullup(unsigned gpio, int value);

extern int gpio_get_value(unsigned gpio);

extern void gpio_set_value(unsigned gpio, int value);



#define gpio_get_value_cansleep gpio_get_value

#define gpio_set_value_cansleep gpio_set_value



/* translates a pin number to a port number */

#define PIN_TO_PORT(val) (val >> 3)



/* wrappers to sleep-enable the previous two functions */

static inline unsigned gpio_to_irq(unsigned gpio)

{

	return PIN_TO_PORT(gpio) + IRQ_U300_GPIO_PORT0;

}

#define gpio_to_irq gpio_to_irq



#endif /* __MACH_U300_GPIO_H */