Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit cbc4dbff authored by Ben Dooks's avatar Ben Dooks Committed by Russell King
Browse files

[ARM] 4512/1: S3C: rename the debug macros for per-cpu updates 



Update the debug macros for use with the new per-cpu
configuration and usage.

Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent b2627588

include/asm-arm/arch-s3c2410/debug-macro.S

+33 −4
Original line number Diff line number Diff line
@@ -14,9 +14,7 @@ 


#include <asm/arch/map.h>

#include <asm/arch/regs-gpio.h>



#include <asm/plat-s3c/regs-serial.h>

#include <asm/plat-s3c/debug-macro.S>



#define S3C2410_UART1_OFF (0x4000)

#define SHIFT_2440TXF (14-9)
@@ -31,7 +29,7 @@ 
#endif

	.endm



	.macro fifo_full rd, rx

	.macro fifo_full_s3c24xx rd, rx

		@ check for arm920 vs arm926. currently assume all arm926

		@ devices have an 64 byte FIFO identical to the s3c2440

		mrc	p15, 0, \rd, c0, c0
@@ -52,7 +50,14 @@ 
		tst	\rd, #S3C2410_UFSTAT_TXFULL

	.endm



	.macro fifo_level rd, rx

	.macro  fifo_full_s3c2410 rd, rx

		ldr	\rd, [ \rx, # S3C2410_UFSTAT ]

		tst	\rd, #S3C2410_UFSTAT_TXFULL

	.endm



/* fifo level reading */



	.macro fifo_level_s3c24xx rd, rx

		mrc	p15, 0, \rd, c1, c0

		tst	\rd, #1

		addeq	\rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
@@ -66,3 +71,27 @@ 
		andne	\rd, \rd, #S3C2410_UFSTAT_TXMASK

		andeq	\rd, \rd, #S3C2440_UFSTAT_TXMASK

	.endm



	.macro fifo_level_s3c2410 rd, rx

		ldr	\rd, [ \rx, # S3C2410_UFSTAT ]

		and	\rd, \rd, #S3C2410_UFSTAT_TXMASK

	.endm



/* Select the correct implementation depending on the configuration. The

 * S3C2440 will get selected by default, as these are the most widely

 * used variants of these

*/



#if defined(CONFIG_CPU_LLSERIAL_S3C2410_ONLY)

#define fifo_full  fifo_full_s3c2410

#define fifo_level fifo_level_s3c2410

#warning 2410only

#elif !defined(CONFIG_CPU_LLSERIAL_S3C2440_ONLY)

#define fifo_full  fifo_full_s3c24xx

#define fifo_level fifo_level_s3c24xx

#warning generic

#endif



/* include the reset of the code which will do the work */



#include <asm/plat-s3c/debug-macro.S>

include/asm-arm/plat-s3c/debug-macro.S

+20 −2
Original line number Diff line number Diff line
@@ -11,7 +11,26 @@ 


#include <asm/plat-s3c/regs-serial.h>



#define S3C2410_UART1_OFF (0x4000)

/* The S3C2440 implementations are used by default as they are the

 * most widely re-used */



	.macro fifo_level_s3c2440 rd, rx

		ldr	\rd, [ \rx, # S3C2410_UFSTAT ]

		and	\rd, \rd, #S3C2440_UFSTAT_TXMASK

	.endm



#ifndef fifo_level

#define fifo_level fifo_level_s3c2410

#endif



	.macro  fifo_full_s3c2440 rd, rx

		ldr	\rd, [ \rx, # S3C2410_UFSTAT ]

		tst	\rd, #S3C2440_UFSTAT_TXFULL

	.endm



#ifndef fifo_full

#define fifo_full fifo_full_s3c2440

#endif



	.macro	senduart,rd,rx

		strb 	\rd, [\rx, # S3C2410_UTXH ]
@@ -37,7 +56,6 @@ 
	.endm



	.macro	waituart,rd,rx



		ldr	\rd, [ \rx, # S3C2410_UFCON ]

		tst	\rd, #S3C2410_UFCON_FIFOMODE	@ fifo enabled?

		beq	1001f				@