Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit cafc8cb5 authored by Nishanth Menon's avatar Nishanth Menon
Browse files

ARM: OMAP: DRA7: powerdomain data: fix powerdomain powerstate 



DRA7 supports only CSWR for CPU, MPU power domains. Core power domain
supports upto INA.

Signed-off-by: default avatarNishanth Menon <nm@ti.com>
Reviewed-by: default avatarKevin Hilman <khilman@linaro.org>
Acked-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
parent 7d1311b9

arch/arm/mach-omap2/powerdomain.h

+1 −0
Original line number Diff line number Diff line
@@ -39,6 +39,7 @@ 
#define PWRSTS_OFF_RET		(PWRSTS_OFF | PWRSTS_RET)

#define PWRSTS_RET_ON		(PWRSTS_RET | PWRSTS_ON)

#define PWRSTS_OFF_RET_ON	(PWRSTS_OFF_RET | PWRSTS_ON)

#define PWRSTS_INA_ON		(PWRSTS_INACTIVE | PWRSTS_ON)





/*

arch/arm/mach-omap2/powerdomains7xx_data.c

+7 −7
Original line number Diff line number Diff line
@@ -160,8 +160,8 @@ static struct powerdomain core_7xx_pwrdm = { 
	.name		  = "core_pwrdm",

	.prcm_offs	  = DRA7XX_PRM_CORE_INST,

	.prcm_partition	  = DRA7XX_PRM_PARTITION,

	.pwrsts		  = PWRSTS_RET_ON,

	.pwrsts_logic_ret = PWRSTS_OFF_RET,

	.pwrsts		  = PWRSTS_INA_ON,

	.pwrsts_logic_ret = PWRSTS_RET,

	.banks		  = 5,

	.pwrsts_mem_ret	= {

		[0] = PWRSTS_OFF_RET,	/* core_nret_bank */
@@ -193,8 +193,8 @@ static struct powerdomain cpu0_7xx_pwrdm = { 
	.name		  = "cpu0_pwrdm",

	.prcm_offs	  = DRA7XX_MPU_PRCM_PRM_C0_INST,

	.prcm_partition	  = DRA7XX_MPU_PRCM_PARTITION,

	.pwrsts		  = PWRSTS_OFF_RET_ON,

	.pwrsts_logic_ret = PWRSTS_OFF_RET,

	.pwrsts		  = PWRSTS_RET_ON,

	.pwrsts_logic_ret = PWRSTS_RET,

	.banks		  = 1,

	.pwrsts_mem_ret	= {

		[0] = PWRSTS_OFF_RET,	/* cpu0_l1 */
@@ -209,8 +209,8 @@ static struct powerdomain cpu1_7xx_pwrdm = { 
	.name		  = "cpu1_pwrdm",

	.prcm_offs	  = DRA7XX_MPU_PRCM_PRM_C1_INST,

	.prcm_partition	  = DRA7XX_MPU_PRCM_PARTITION,

	.pwrsts		  = PWRSTS_OFF_RET_ON,

	.pwrsts_logic_ret = PWRSTS_OFF_RET,

	.pwrsts		  = PWRSTS_RET_ON,

	.pwrsts_logic_ret = PWRSTS_RET,

	.banks		  = 1,

	.pwrsts_mem_ret	= {

		[0] = PWRSTS_OFF_RET,	/* cpu1_l1 */
@@ -243,7 +243,7 @@ static struct powerdomain mpu_7xx_pwrdm = { 
	.prcm_offs	  = DRA7XX_PRM_MPU_INST,

	.prcm_partition	  = DRA7XX_PRM_PARTITION,

	.pwrsts		  = PWRSTS_RET_ON,

	.pwrsts_logic_ret = PWRSTS_OFF_RET,

	.pwrsts_logic_ret = PWRSTS_RET,

	.banks		  = 2,

	.pwrsts_mem_ret	= {

		[0] = PWRSTS_OFF_RET,	/* mpu_l2 */