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Commit ca48080a authored by Stephen Warren's avatar Stephen Warren
Browse files

drm/tegra: use reset framework 



Tegra's clock driver now provides an implementation of the common
reset API (include/linux/reset.h). Use this instead of the old Tegra-
specific API; that will soon be removed.

Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
Acked-By: default avatarTerje Bergstrom <tbergstrom@nvidia.com>
parent 3127a6b2

drivers/gpu/drm/tegra/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -2,6 +2,7 @@ config DRM_TEGRA 
	bool "NVIDIA Tegra DRM"

	depends on ARCH_TEGRA || ARCH_MULTIPLATFORM

	depends on DRM

	depends on RESET_CONTROLLER

	select TEGRA_HOST1X

	select DRM_KMS_HELPER

	select DRM_KMS_FB_HELPER

drivers/gpu/drm/tegra/dc.c

+8 −2
Original line number Diff line number Diff line
@@ -8,8 +8,8 @@ 
 */



#include <linux/clk.h>

#include <linux/clk/tegra.h>

#include <linux/debugfs.h>

#include <linux/reset.h>



#include "dc.h"

#include "drm.h"
@@ -712,7 +712,7 @@ static void tegra_crtc_prepare(struct drm_crtc *crtc) 
	unsigned long value;



	/* hardware initialization */

	tegra_periph_reset_deassert(dc->clk);

	reset_control_deassert(dc->rst);

	usleep_range(10000, 20000);



	if (dc->pipe)
@@ -1187,6 +1187,12 @@ static int tegra_dc_probe(struct platform_device *pdev) 
		return PTR_ERR(dc->clk);

	}



	dc->rst = devm_reset_control_get(&pdev->dev, "dc");

	if (IS_ERR(dc->rst)) {

		dev_err(&pdev->dev, "failed to get reset\n");

		return PTR_ERR(dc->rst);

	}



	err = clk_prepare_enable(dc->clk);

	if (err < 0)

		return err;

drivers/gpu/drm/tegra/drm.h

+3 −0
Original line number Diff line number Diff line
@@ -19,6 +19,8 @@ 
#include <drm/drm_fb_helper.h>

#include <drm/drm_fixed.h>



struct reset_control;



struct tegra_fb {

	struct drm_framebuffer base;

	struct tegra_bo **planes;
@@ -93,6 +95,7 @@ struct tegra_dc { 
	int pipe;



	struct clk *clk;

	struct reset_control *rst;

	void __iomem *regs;

	int irq;

drivers/gpu/drm/tegra/gr3d.c

+16 −0
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ 
#include <linux/host1x.h>

#include <linux/module.h>

#include <linux/platform_device.h>

#include <linux/reset.h>

#include <linux/tegra-powergate.h>



#include "drm.h"
@@ -22,6 +23,8 @@ struct gr3d { 
	struct host1x_channel *channel;

	struct clk *clk_secondary;

	struct clk *clk;

	struct reset_control *rst_secondary;

	struct reset_control *rst;



	DECLARE_BITMAP(addr_regs, GR3D_NUM_REGS);

};
@@ -255,12 +258,25 @@ static int gr3d_probe(struct platform_device *pdev) 
		return PTR_ERR(gr3d->clk);

	}



	gr3d->rst = devm_reset_control_get(&pdev->dev, "3d");

	if (IS_ERR(gr3d->rst)) {

		dev_err(&pdev->dev, "cannot get reset\n");

		return PTR_ERR(gr3d->rst);

	}



	if (of_device_is_compatible(np, "nvidia,tegra30-gr3d")) {

		gr3d->clk_secondary = devm_clk_get(&pdev->dev, "3d2");

		if (IS_ERR(gr3d->clk)) {

			dev_err(&pdev->dev, "cannot get secondary clock\n");

			return PTR_ERR(gr3d->clk);

		}



		gr3d->rst_secondary = devm_reset_control_get(&pdev->dev,

								"3d2");

		if (IS_ERR(gr3d->rst_secondary)) {

			dev_err(&pdev->dev, "cannot get secondary reset\n");

			return PTR_ERR(gr3d->rst_secondary);

		}

	}



	err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_3D, gr3d->clk);

drivers/gpu/drm/tegra/hdmi.c

+11 −4
Original line number Diff line number Diff line
@@ -8,10 +8,10 @@ 
 */



#include <linux/clk.h>

#include <linux/clk/tegra.h>

#include <linux/debugfs.h>

#include <linux/hdmi.h>

#include <linux/regulator/consumer.h>

#include <linux/reset.h>



#include "hdmi.h"

#include "drm.h"
@@ -49,6 +49,7 @@ struct tegra_hdmi { 


	struct clk *clk_parent;

	struct clk *clk;

	struct reset_control *rst;



	const struct tegra_hdmi_config *config;
@@ -731,9 +732,9 @@ static int tegra_output_hdmi_enable(struct tegra_output *output) 
		return err;

	}



	tegra_periph_reset_assert(hdmi->clk);

	reset_control_assert(hdmi->rst);

	usleep_range(1000, 2000);

	tegra_periph_reset_deassert(hdmi->clk);

	reset_control_deassert(hdmi->rst);



	tegra_dc_writel(dc, VSYNC_H_POSITION(1),

			DC_DISP_DISP_TIMING_OPTIONS);
@@ -912,7 +913,7 @@ static int tegra_output_hdmi_disable(struct tegra_output *output) 
{

	struct tegra_hdmi *hdmi = to_hdmi(output);



	tegra_periph_reset_assert(hdmi->clk);

	reset_control_assert(hdmi->rst);

	clk_disable(hdmi->clk);

	regulator_disable(hdmi->pll);
@@ -1338,6 +1339,12 @@ static int tegra_hdmi_probe(struct platform_device *pdev) 
		return PTR_ERR(hdmi->clk);

	}



	hdmi->rst = devm_reset_control_get(&pdev->dev, "hdmi");

	if (IS_ERR(hdmi->rst)) {

		dev_err(&pdev->dev, "failed to get reset\n");

		return PTR_ERR(hdmi->rst);

	}



	err = clk_prepare(hdmi->clk);

	if (err < 0)

		return err;