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Commit ca185c68 authored by Stéphane Marchesin's avatar Stéphane Marchesin Committed by Thierry Reding
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drm/tegra: sor - Change power down ordering 



Lanes are powered up in decreasing order. Power them down in increasing
order for consistency.

Signed-off-by: default avatarStéphane Marchesin <marcheu@chromium.org>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 143b1df2

drivers/gpu/drm/tegra/sor.c

+1 −1
Original line number Diff line number Diff line
@@ -748,7 +748,7 @@ static int tegra_sor_power_down(struct tegra_sor *sor) 
	tegra_sor_writel(sor, value, SOR_DP_PADCTL_0);



	/* stop lane sequencer */

	value = SOR_LANE_SEQ_CTL_TRIGGER | SOR_LANE_SEQ_CTL_SEQUENCE_DOWN |

	value = SOR_LANE_SEQ_CTL_TRIGGER | SOR_LANE_SEQ_CTL_SEQUENCE_UP |

		SOR_LANE_SEQ_CTL_POWER_STATE_DOWN;

	tegra_sor_writel(sor, value, SOR_LANE_SEQ_CTL);