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Commit c8fff3ed authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'pwm/for-4.4-rc1' of...

Merge tag 'pwm/for-4.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm

Pull pwm updates from Thierry Reding:
 "This round contains a couple of new drivers for the Marvell Berlin
  family of SoCs, various SoCs from Renesas and Broadcom as well as the
  backlight PWM present on MediaTek SoCs.

  Further existing drivers are extended to support a wider range of
  hardware.

  The remaining patches are minor fixes and cleanups across the board.

  Note that one of the patches included in this pull request is against
  arch/unicore32.  I've included it here because I couldn't get a
  response from Guan Xuetao and I consider the change low-risk.
  Equivalent patches have been merged and tested in Samsung and PXA
  trees.  The goal is to finally get rid of legacy code paths that have
  repeatedly been causing headaches"

* tag 'pwm/for-4.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (24 commits)
  pwm: sunxi: Fix whitespace issue
  pwm: sysfs: Make use of the DEVICE_ATTR_[RW][WO] macro's
  pwm: sysfs: Remove unnecessary temporary variable
  unicore32: nb0916: Use PWM lookup table
  pwm: pwm-rcar: Revise the device tree binding document about compatible
  pwm: Return -ENODEV if no PWM lookup match is found
  pwm: sun4i: Add support for PWM controller on sun5i SoCs
  pwm: Set enable state properly on failed call to enable
  pwm: lpss: Add support for runtime PM
  pwm: lpss: Add more Intel Broxton IDs
  pwm: lpss: Support all four PWMs on Intel Broxton
  pwm: lpss: Add support for multiple PWMs
  pwm-pca9685: enable ACPI device found on Galileo Gen2
  pwm: Add MediaTek display PWM driver support
  dt-bindings: pwm: Add MediaTek display PWM bindings
  pwm: tipwmss: Enable on TI DRA7x and AM437x
  pwm: atmel-hlcdc: add sama5d2 SoC support.
  pwm: Add Broadcom BCM7038 PWM controller support
  Documentation: dt: add Broadcom BCM7038 PWM controller binding
  pwm: Add support for R-Car PWM Timer
  ...
parents baf51c43 5dcd7b42
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Broadcom BCM7038 PWM controller (BCM7xxx Set Top Box PWM controller)

Required properties:

- compatible: must be "brcm,bcm7038-pwm"
- reg: physical base address and length for this controller
- #pwm-cells: should be 2. See pwm.txt in this directory for a description
  of the cells format
- clocks: a phandle to the reference clock for this block which is fed through
  its internal variable clock frequency generator


Example:

	pwm: pwm@f0408000 {
		compatible = "brcm,bcm7038-pwm";
		reg = <0xf0408000 0x28>;
		#pwm-cells = <2>;
		clocks = <&upg_fixed>;
	};
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Berlin PWM controller

Required properties:
- compatible: should be "marvell,berlin-pwm"
- reg: physical base address and length of the controller's registers
- clocks: phandle to the input clock
- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
  the cells format.

Example:

pwm: pwm@f7f20000 {
	compatible = "marvell,berlin-pwm";
	reg = <0xf7f20000 0x40>;
	clocks = <&chip_clk CLKID_CFG>;
	#pwm-cells = <3>;
}
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MediaTek display PWM controller

Required properties:
 - compatible: should be "mediatek,<name>-disp-pwm":
   - "mediatek,mt8173-disp-pwm": found on mt8173 SoC.
   - "mediatek,mt6595-disp-pwm": found on mt6595 SoC.
 - reg: physical base address and length of the controller's registers.
 - #pwm-cells: must be 2. See pwm.txt in this directory for a description of
   the cell format.
 - clocks: phandle and clock specifier of the PWM reference clock.
 - clock-names: must contain the following:
   - "main": clock used to generate PWM signals.
   - "mm": sync signals from the modules of mmsys.
 - pinctrl-names: Must contain a "default" entry.
 - pinctrl-0: One property must exist for each entry in pinctrl-names.
   See pinctrl/pinctrl-bindings.txt for details of the property values.

Example:
	pwm0: pwm@1401e000 {
		compatible = "mediatek,mt8173-disp-pwm",
			     "mediatek,mt6595-disp-pwm";
		reg = <0 0x1401e000 0 0x1000>;
		#pwm-cells = <2>;
		clocks = <&mmsys CLK_MM_DISP_PWM026M>,
			 <&mmsys CLK_MM_DISP_PWM0MM>;
		clock-names = "main", "mm";
		pinctrl-names = "default";
		pinctrl-0 = <&disp_pwm0_pins>;
	};

	backlight_lcd: backlight_lcd {
		compatible = "pwm-backlight";
		pwms = <&pwm0 0 1000000>;
		brightness-levels = <
			  0  16  32  48  64  80  96 112
			128 144 160 176 192 208 224 240
			255
		>;
		default-brightness-level = <9>;
		power-supply = <&mt6397_vio18_reg>;
		enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>;
	};
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@@ -3,6 +3,8 @@ Allwinner sun4i and sun7i SoC PWM controller
Required properties:
  - compatible: should be one of:
    - "allwinner,sun4i-a10-pwm"
    - "allwinner,sun5i-a10s-pwm"
    - "allwinner,sun5i-a13-pwm"
    - "allwinner,sun7i-a20-pwm"
  - reg: physical base address and length of the controller's registers
  - #pwm-cells: should be 3. See pwm.txt in this directory for a description of
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* Renesas R-Car PWM Timer Controller

Required Properties:
- compatible: should be "renesas,pwm-rcar" and one of the following.
 - "renesas,pwm-r8a7778": for R-Car M1A
 - "renesas,pwm-r8a7779": for R-Car H1
 - "renesas,pwm-r8a7790": for R-Car H2
 - "renesas,pwm-r8a7791": for R-Car M2-W
 - "renesas,pwm-r8a7794": for R-Car E2
- reg: base address and length of the registers block for the PWM.
- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
  the cells format.
- clocks: clock phandle and specifier pair.
- pinctrl-0: phandle, referring to a default pin configuration node.
- pinctrl-names: Set to "default".

Example: R8A7790 (R-Car H2) PWM Timer node

	pwm0: pwm@e6e30000 {
		compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar";
		reg = <0 0xe6e30000 0 0x8>;
		#pwm-cells = <2>;
		clocks = <&mstp5_clks R8A7790_CLK_PWM>;
		pinctrl-0 = <&pwm0_pins>;
		pinctrl-names = "default";
	};
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