Merge branch 'for_3.0/pm-fixes' of...

o	"dt" is the current value of the dyntick counter that is incremented

	when entering or leaving dynticks idle state, either by the

	scheduler or by irq.  The number after the "/" is the interrupt

	nesting depth when in dyntick-idle state, or one greater than

	the interrupt-nesting depth otherwise.

	This field is displayed only for CONFIG_NO_HZ kernels.

o	"dn" is the current value of the dyntick counter that is incremented

	when entering or leaving dynticks idle state via NMI.  If both

	the "dt" and "dn" values are even, then this CPU is in dynticks

	idle mode and may be ignored by RCU.  If either of these two

	counters is odd, then RCU must be alert to the possibility of

	an RCU read-side critical section running on this CPU.

	scheduler or by irq.  This number is even if the CPU is in

	dyntick idle mode and odd otherwise.  The number after the first

	"/" is the interrupt nesting depth when in dyntick-idle state,

	or one greater than the interrupt-nesting depth otherwise.

	The number after the second "/" is the NMI nesting depth.

	This field is displayed only for CONFIG_NO_HZ kernels.

      But each individual write to debugfs can implement a SINGLE

      method override. i.e. if we want to insert/override multiple

      ACPI methods, we need to redo step c) ~ g) for multiple times.

Note: Be aware that root can mis-use this driver to modify arbitrary

      memory and gain additional rights, if root's privileges got

      restricted (for example if root is not allowed to load additional

      modules after boot).

See Documentation/crypto/async-tx-api.txt

			DMA Engine API Guide

			====================

		 Vinod Koul <vinod dot koul at intel.com>

NOTE: For DMA Engine usage in async_tx please see:

	Documentation/crypto/async-tx-api.txt

Below is a guide to device driver writers on how to use the Slave-DMA API of the

DMA Engine. This is applicable only for slave DMA usage only.

The slave DMA usage consists of following steps

1. Allocate a DMA slave channel

2. Set slave and controller specific parameters

3. Get a descriptor for transaction

4. Submit the transaction and wait for callback notification

1. Allocate a DMA slave channel

Channel allocation is slightly different in the slave DMA context, client

drivers typically need a channel from a particular DMA controller only and even

in some cases a specific channel is desired. To request a channel

dma_request_channel() API is used.

Interface:

struct dma_chan *dma_request_channel(dma_cap_mask_t mask,

		dma_filter_fn filter_fn,

		void *filter_param);

where dma_filter_fn is defined as:

typedef bool (*dma_filter_fn)(struct dma_chan *chan, void *filter_param);

When the optional 'filter_fn' parameter is set to NULL dma_request_channel

simply returns the first channel that satisfies the capability mask.  Otherwise,

when the mask parameter is insufficient for specifying the necessary channel,

the filter_fn routine can be used to disposition the available channels in the

system. The filter_fn routine is called once for each free channel in the

system.  Upon seeing a suitable channel filter_fn returns DMA_ACK which flags

that channel to be the return value from dma_request_channel.  A channel

allocated via this interface is exclusive to the caller, until

dma_release_channel() is called.

2. Set slave and controller specific parameters

Next step is always to pass some specific information to the DMA driver. Most of

the generic information which a slave DMA can use is in struct dma_slave_config.

It allows the clients to specify DMA direction, DMA addresses, bus widths, DMA

burst lengths etc. If some DMA controllers have more parameters to be sent then

they should try to embed struct dma_slave_config in their controller specific

structure. That gives flexibility to client to pass more parameters, if

required.

Interface:

int dmaengine_slave_config(struct dma_chan *chan,

					  struct dma_slave_config *config)

3. Get a descriptor for transaction

For slave usage the various modes of slave transfers supported by the

DMA-engine are:

slave_sg	- DMA a list of scatter gather buffers from/to a peripheral

dma_cyclic	- Perform a cyclic DMA operation from/to a peripheral till the

		  operation is explicitly stopped.

The non NULL return of this transfer API represents a "descriptor" for the given

transaction.

Interface:

struct dma_async_tx_descriptor *(*chan->device->device_prep_dma_sg)(

		struct dma_chan *chan,

		struct scatterlist *dst_sg, unsigned int dst_nents,

		struct scatterlist *src_sg, unsigned int src_nents,

		unsigned long flags);

struct dma_async_tx_descriptor *(*chan->device->device_prep_dma_cyclic)(

		struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,

		size_t period_len, enum dma_data_direction direction);

4. Submit the transaction and wait for callback notification

To schedule the transaction to be scheduled by dma device, the "descriptor"

returned in above (3) needs to be submitted.

To tell the dma driver that a transaction is ready to be serviced, the

descriptor->submit() callback needs to be invoked. This chains the descriptor to

the pending queue.

The transactions in the pending queue can be activated by calling the

issue_pending API. If channel is idle then the first transaction in queue is

started and subsequent ones queued up.

On completion of the DMA operation the next in queue is submitted and a tasklet

triggered. The tasklet would then call the client driver completion callback

routine for notification, if set.

Interface:

void dma_async_issue_pending(struct dma_chan *chan);

==============================================================================

Additional usage notes for dma driver writers

1/ Although DMA engine specifies that completion callback routines cannot submit

any new operations, but typically for slave DMA subsequent transaction may not

be available for submit prior to callback routine being called. This requirement

is not a requirement for DMA-slave devices. But they should take care to drop

the spin-lock they might be holding before calling the callback routine

---------------------------

What:	x86 floppy disable_hlt

When:	2012

Why:	ancient workaround of dubious utility clutters the

	code used by everybody else.

Who:	Len Brown <len.brown@intel.com>

---------------------------

What:	CONFIG_APM_CPU_IDLE, and its ability to call APM BIOS in idle

When:	2012

Why:	This optional sub-feature of APM is of dubious reliability,

	and ancient APM laptops are likely better served by calling HLT.

	Deleting CONFIG_APM_CPU_IDLE allows x86 to stop exporting

	the pm_idle function pointer to modules.

Who:	Len Brown <len.brown@intel.com>

----------------------------

What:	x86_32 "no-hlt" cmdline param

When:	2012

Why:	remove a branch from idle path, simplify code used by everybody.

	This option disabled the use of HLT in idle and machine_halt()

	for hardware that was flakey 15-years ago.  Today we have

	"idle=poll" that removed HLT from idle, and so if such a machine

	is still running the upstream kernel, "idle=poll" is likely sufficient.

Who:	Len Brown <len.brown@intel.com>

----------------------------

What:	x86 "idle=mwait" cmdline param

When:	2012

Why:	simplify x86 idle code

Who:	Len Brown <len.brown@intel.com>

----------------------------

What:	PRISM54

When:	2.6.34

prototypes:

	struct inode *(*alloc_inode)(struct super_block *sb);

	void (*destroy_inode)(struct inode *);

	void (*dirty_inode) (struct inode *);

	void (*dirty_inode) (struct inode *, int flags);

	int (*write_inode) (struct inode *, struct writeback_control *wbc);

	int (*drop_inode) (struct inode *);

	void (*evict_inode) (struct inode *);

			s_umount

alloc_inode:

destroy_inode:

dirty_inode:				(must not sleep)

dirty_inode:

write_inode:

drop_inode:				!!!inode->i_lock!!!

evict_inode: