Loading arch/powerpc/kernel/ppc_ksyms.c +1 −1 Original line number Diff line number Diff line Loading @@ -208,7 +208,7 @@ EXPORT_SYMBOL(mmu_hash_lock); /* For MOL */ extern long *intercept_table; EXPORT_SYMBOL(intercept_table); #endif /* CONFIG_PPC_STD_MMU_32 */ #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) #ifdef CONFIG_PPC_DCR_NATIVE EXPORT_SYMBOL(__mtdcr); EXPORT_SYMBOL(__mfdcr); #endif arch/powerpc/sysdev/Makefile +2 −1 Original line number Diff line number Diff line Loading @@ -5,7 +5,8 @@ endif obj-$(CONFIG_MPIC) += mpic.o obj-$(CONFIG_PPC_INDIRECT_PCI) += indirect_pci.o obj-$(CONFIG_PPC_MPC106) += grackle.o obj-$(CONFIG_PPC_DCR) += dcr.o dcr-low.o obj-$(CONFIG_PPC_DCR) += dcr.o obj-$(CONFIG_PPC_DCR_NATIVE) += dcr-low.o obj-$(CONFIG_U3_DART) += dart_iommu.o obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o obj-$(CONFIG_FSL_SOC) += fsl_soc.o Loading include/asm-powerpc/dcr-native.h +35 −2 Original line number Diff line number Diff line Loading @@ -20,8 +20,7 @@ #ifndef _ASM_POWERPC_DCR_NATIVE_H #define _ASM_POWERPC_DCR_NATIVE_H #ifdef __KERNEL__ #include <asm/reg.h> #ifndef __ASSEMBLY__ typedef struct {} dcr_host_t; Loading @@ -32,7 +31,41 @@ typedef struct {} dcr_host_t; #define dcr_read(host, dcr_n) mfdcr(dcr_n) #define dcr_write(host, dcr_n, value) mtdcr(dcr_n, value) /* Device Control Registers */ void __mtdcr(int reg, unsigned int val); unsigned int __mfdcr(int reg); #define mfdcr(rn) \ ({unsigned int rval; \ if (__builtin_constant_p(rn)) \ asm volatile("mfdcr %0," __stringify(rn) \ : "=r" (rval)); \ else \ rval = __mfdcr(rn); \ rval;}) #define mtdcr(rn, v) \ do { \ if (__builtin_constant_p(rn)) \ asm volatile("mtdcr " __stringify(rn) ",%0" \ : : "r" (v)); \ else \ __mtdcr(rn, v); \ } while (0) /* R/W of indirect DCRs make use of standard naming conventions for DCRs */ #define mfdcri(base, reg) \ ({ \ mtdcr(base ## _CFGADDR, base ## _ ## reg); \ mfdcr(base ## _CFGDATA); \ }) #define mtdcri(base, reg, data) \ do { \ mtdcr(base ## _CFGADDR, base ## _ ## reg); \ mtdcr(base ## _CFGDATA, data); \ } while (0) #endif /* __ASSEMBLY__ */ #endif /* __KERNEL__ */ #endif /* _ASM_POWERPC_DCR_NATIVE_H */ Loading include/asm-powerpc/dcr.h +2 −0 Original line number Diff line number Diff line Loading @@ -20,6 +20,7 @@ #ifndef _ASM_POWERPC_DCR_H #define _ASM_POWERPC_DCR_H #ifdef __KERNEL__ #ifdef CONFIG_PPC_DCR #ifdef CONFIG_PPC_DCR_NATIVE #include <asm/dcr-native.h> Loading @@ -38,5 +39,6 @@ extern unsigned int dcr_resource_len(struct device_node *np, unsigned int index); #endif /* CONFIG_PPC_MERGE */ #endif /* CONFIG_PPC_DCR */ #endif /* __KERNEL__ */ #endif /* _ASM_POWERPC_DCR_H */ include/asm-ppc/reg_booke.h +2 −34 Original line number Diff line number Diff line Loading @@ -9,41 +9,9 @@ #ifndef __ASM_PPC_REG_BOOKE_H__ #define __ASM_PPC_REG_BOOKE_H__ #ifndef __ASSEMBLY__ /* Device Control Registers */ void __mtdcr(int reg, unsigned int val); unsigned int __mfdcr(int reg); #define mfdcr(rn) \ ({unsigned int rval; \ if (__builtin_constant_p(rn)) \ asm volatile("mfdcr %0," __stringify(rn) \ : "=r" (rval)); \ else \ rval = __mfdcr(rn); \ rval;}) #define mtdcr(rn, v) \ do { \ if (__builtin_constant_p(rn)) \ asm volatile("mtdcr " __stringify(rn) ",%0" \ : : "r" (v)); \ else \ __mtdcr(rn, v); \ } while (0) /* R/W of indirect DCRs make use of standard naming conventions for DCRs */ #define mfdcri(base, reg) \ ({ \ mtdcr(base ## _CFGADDR, base ## _ ## reg); \ mfdcr(base ## _CFGDATA); \ }) #define mtdcri(base, reg, data) \ do { \ mtdcr(base ## _CFGADDR, base ## _ ## reg); \ mtdcr(base ## _CFGDATA, data); \ } while (0) #include <asm/dcr.h> #ifndef __ASSEMBLY__ /* Performance Monitor Registers */ #define mfpmr(rn) ({unsigned int rval; \ asm volatile("mfpmr %0," __stringify(rn) \ Loading Loading
arch/powerpc/kernel/ppc_ksyms.c +1 −1 Original line number Diff line number Diff line Loading @@ -208,7 +208,7 @@ EXPORT_SYMBOL(mmu_hash_lock); /* For MOL */ extern long *intercept_table; EXPORT_SYMBOL(intercept_table); #endif /* CONFIG_PPC_STD_MMU_32 */ #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) #ifdef CONFIG_PPC_DCR_NATIVE EXPORT_SYMBOL(__mtdcr); EXPORT_SYMBOL(__mfdcr); #endif
arch/powerpc/sysdev/Makefile +2 −1 Original line number Diff line number Diff line Loading @@ -5,7 +5,8 @@ endif obj-$(CONFIG_MPIC) += mpic.o obj-$(CONFIG_PPC_INDIRECT_PCI) += indirect_pci.o obj-$(CONFIG_PPC_MPC106) += grackle.o obj-$(CONFIG_PPC_DCR) += dcr.o dcr-low.o obj-$(CONFIG_PPC_DCR) += dcr.o obj-$(CONFIG_PPC_DCR_NATIVE) += dcr-low.o obj-$(CONFIG_U3_DART) += dart_iommu.o obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o obj-$(CONFIG_FSL_SOC) += fsl_soc.o Loading
include/asm-powerpc/dcr-native.h +35 −2 Original line number Diff line number Diff line Loading @@ -20,8 +20,7 @@ #ifndef _ASM_POWERPC_DCR_NATIVE_H #define _ASM_POWERPC_DCR_NATIVE_H #ifdef __KERNEL__ #include <asm/reg.h> #ifndef __ASSEMBLY__ typedef struct {} dcr_host_t; Loading @@ -32,7 +31,41 @@ typedef struct {} dcr_host_t; #define dcr_read(host, dcr_n) mfdcr(dcr_n) #define dcr_write(host, dcr_n, value) mtdcr(dcr_n, value) /* Device Control Registers */ void __mtdcr(int reg, unsigned int val); unsigned int __mfdcr(int reg); #define mfdcr(rn) \ ({unsigned int rval; \ if (__builtin_constant_p(rn)) \ asm volatile("mfdcr %0," __stringify(rn) \ : "=r" (rval)); \ else \ rval = __mfdcr(rn); \ rval;}) #define mtdcr(rn, v) \ do { \ if (__builtin_constant_p(rn)) \ asm volatile("mtdcr " __stringify(rn) ",%0" \ : : "r" (v)); \ else \ __mtdcr(rn, v); \ } while (0) /* R/W of indirect DCRs make use of standard naming conventions for DCRs */ #define mfdcri(base, reg) \ ({ \ mtdcr(base ## _CFGADDR, base ## _ ## reg); \ mfdcr(base ## _CFGDATA); \ }) #define mtdcri(base, reg, data) \ do { \ mtdcr(base ## _CFGADDR, base ## _ ## reg); \ mtdcr(base ## _CFGDATA, data); \ } while (0) #endif /* __ASSEMBLY__ */ #endif /* __KERNEL__ */ #endif /* _ASM_POWERPC_DCR_NATIVE_H */ Loading
include/asm-powerpc/dcr.h +2 −0 Original line number Diff line number Diff line Loading @@ -20,6 +20,7 @@ #ifndef _ASM_POWERPC_DCR_H #define _ASM_POWERPC_DCR_H #ifdef __KERNEL__ #ifdef CONFIG_PPC_DCR #ifdef CONFIG_PPC_DCR_NATIVE #include <asm/dcr-native.h> Loading @@ -38,5 +39,6 @@ extern unsigned int dcr_resource_len(struct device_node *np, unsigned int index); #endif /* CONFIG_PPC_MERGE */ #endif /* CONFIG_PPC_DCR */ #endif /* __KERNEL__ */ #endif /* _ASM_POWERPC_DCR_H */
include/asm-ppc/reg_booke.h +2 −34 Original line number Diff line number Diff line Loading @@ -9,41 +9,9 @@ #ifndef __ASM_PPC_REG_BOOKE_H__ #define __ASM_PPC_REG_BOOKE_H__ #ifndef __ASSEMBLY__ /* Device Control Registers */ void __mtdcr(int reg, unsigned int val); unsigned int __mfdcr(int reg); #define mfdcr(rn) \ ({unsigned int rval; \ if (__builtin_constant_p(rn)) \ asm volatile("mfdcr %0," __stringify(rn) \ : "=r" (rval)); \ else \ rval = __mfdcr(rn); \ rval;}) #define mtdcr(rn, v) \ do { \ if (__builtin_constant_p(rn)) \ asm volatile("mtdcr " __stringify(rn) ",%0" \ : : "r" (v)); \ else \ __mtdcr(rn, v); \ } while (0) /* R/W of indirect DCRs make use of standard naming conventions for DCRs */ #define mfdcri(base, reg) \ ({ \ mtdcr(base ## _CFGADDR, base ## _ ## reg); \ mfdcr(base ## _CFGDATA); \ }) #define mtdcri(base, reg, data) \ do { \ mtdcr(base ## _CFGADDR, base ## _ ## reg); \ mtdcr(base ## _CFGDATA, data); \ } while (0) #include <asm/dcr.h> #ifndef __ASSEMBLY__ /* Performance Monitor Registers */ #define mfpmr(rn) ({unsigned int rval; \ asm volatile("mfpmr %0," __stringify(rn) \ Loading