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Commit c7741713 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu 

* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (56 commits)
  m68k: allow ColdFire 547x and 548x CPUs to be built with MMU enabled
  m68k/Kconfig: Separate classic m68k and coldfire early
  m68k: add ColdFire with MMU enabled support to the m68k mem init code
  m68k: do not use m68k startup or interrupt code for ColdFire CPUs
  m68k: add ColdFire FPU support for the V4e ColdFire CPUs
  m68k: adjustments to stack frame for ColdFire with MMU enabled
  m68k: use non-MMU linker script for ColdFire MMU builds
  m68k: ColdFire with MMU enabled uses same clocking code as non-MMU
  m68k: add code to setup a ColdFire 54xx platform when MMU enabled
  m68k: use non-MMU entry.S code when compiling for ColdFire CPU
  m68k: create ColdFire MMU pgalloc code
  m68k: compile appropriate mm arch files for ColdFire MMU support
  m68k: ColdFire V4e MMU paging init code and miss handler
  m68k: use ColdFire MMU read/write bit flags when ioremapping
  m68k: modify cache push and clear code for ColdFire with MMU enable
  m68k: use tracehook_report_syscall_entry/exit for ColdFire MMU ptrace path
  m68k: ColdFire V4e MMU context support code
  m68k: MMU enabled ColdFire needs 8k ELF alignment
  m68k: set ColdFire MMU page size
  m68k: define PAGE_OFFSET_RAW for ColdFire CPU with MMU enabled
  ...
parents e4e88f31 1f7034b9

arch/m68k/Kconfig

+14 −3
Original line number Diff line number Diff line
@@ -3,7 +3,6 @@ config M68K 
	default y

	select HAVE_IDE

	select HAVE_AOUT if MMU

	select GENERIC_ATOMIC64 if MMU

	select HAVE_GENERIC_HARDIRQS

	select GENERIC_IRQ_SHOW

	select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS
@@ -41,12 +40,15 @@ config GENERIC_CALIBRATE_DELAY 
config GENERIC_IOMAP

	def_bool MMU



config GENERIC_CSUM

	bool



config TIME_LOW_RES

	bool

	default y



config ARCH_USES_GETTIMEOFFSET

	def_bool MMU

	def_bool MMU && !COLDFIRE



config NO_IOPORT

	def_bool y
@@ -61,6 +63,12 @@ config ZONE_DMA 
config CPU_HAS_NO_BITFIELDS

	bool



config CPU_HAS_NO_MULDIV64

	bool



config CPU_HAS_ADDRESS_SPACES

	bool



config HZ

	int

	default 1000 if CLEOPATRA
@@ -80,9 +88,12 @@ config MMU 
config MMU_MOTOROLA

	bool



config MMU_COLDFIRE

	bool



config MMU_SUN3

	bool

	depends on MMU && !MMU_MOTOROLA

	depends on MMU && !MMU_MOTOROLA && !MMU_COLDFIRE



menu "Platform setup"

arch/m68k/Kconfig.cpu

+50 −28
Original line number Diff line number Diff line 
comment "Processor Type"



choice

	prompt "CPU family support"

	default M68KCLASSIC if MMU

	default COLDFIRE if !MMU

	help

	  The Freescale (was Motorola) M68K family of processors implements

	  the full 68000 processor instruction set.

	  The Freescale ColdFire family of processors is a modern derivitive

	  of the 68000 processor family. They are mainly targeted at embedded

	  applications, and are all System-On-Chip (SOC) devices, as opposed

	  to stand alone CPUs. They implement a subset of the original 68000

	  processor instruction set.

	  If you anticipate running this kernel on a computer with a classic

	  MC68xxx processor, select M68KCLASSIC.

	  If you anticipate running this kernel on a computer with a ColdFire

	  processor, select COLDFIRE.



config M68KCLASSIC

	bool "Classic M68K CPU family support"



config COLDFIRE

	bool "Coldfire CPU family support"

	select GENERIC_GPIO

	select ARCH_REQUIRE_GPIOLIB

	select CPU_HAS_NO_BITFIELDS

	select CPU_HAS_NO_MULDIV64

	select GENERIC_CSUM



endchoice



if M68KCLASSIC



config M68000

	bool

	select CPU_HAS_NO_BITFIELDS

	select CPU_HAS_NO_MULDIV64

	select GENERIC_CSUM

	help

	  The Freescale (was Motorola) 68000 CPU is the first generation of

	  the well known M68K family of processors. The CPU core as well as
@@ -18,21 +52,11 @@ config MCPU32 
	  based on the 68020 processor. For the most part it is used in

	  System-On-Chip parts, and does not contain a paging MMU.



config COLDFIRE

	bool

	select GENERIC_GPIO

	select ARCH_REQUIRE_GPIOLIB

	select CPU_HAS_NO_BITFIELDS

	help

	  The Freescale ColdFire family of processors is a modern derivitive

	  of the 68000 processor family. They are mainly targeted at embedded

	  applications, and are all System-On-Chip (SOC) devices, as opposed

	  to stand alone CPUs. They implement a subset of the original 68000

	  processor instruction set.



config M68020

	bool "68020 support"

	depends on MMU

	select GENERIC_ATOMIC64

	select CPU_HAS_ADDRESS_SPACES

	help

	  If you anticipate running this kernel on a computer with a MC68020

	  processor, say Y. Otherwise, say N. Note that the 68020 requires a
@@ -42,6 +66,8 @@ config M68020 
config M68030

	bool "68030 support"

	depends on MMU && !MMU_SUN3

	select GENERIC_ATOMIC64

	select CPU_HAS_ADDRESS_SPACES

	help

	  If you anticipate running this kernel on a computer with a MC68030

	  processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
@@ -50,6 +76,8 @@ config M68030 
config M68040

	bool "68040 support"

	depends on MMU && !MMU_SUN3

	select GENERIC_ATOMIC64

	select CPU_HAS_ADDRESS_SPACES

	help

	  If you anticipate running this kernel on a computer with a MC68LC040

	  or MC68040 processor, say Y. Otherwise, say N. Note that an
@@ -59,6 +87,8 @@ config M68040 
config M68060

	bool "68060 support"

	depends on MMU && !MMU_SUN3

	select GENERIC_ATOMIC64

	select CPU_HAS_ADDRESS_SPACES

	help

	  If you anticipate running this kernel on a computer with a MC68060

	  processor, say Y. Otherwise, say N.
@@ -91,10 +121,13 @@ config M68360 
	help

	  Motorola 68360 processor support.



endif # M68KCLASSIC



if COLDFIRE



config M5206

	bool "MCF5206"

	depends on !MMU

	select COLDFIRE

	select COLDFIRE_SW_A7

	select HAVE_MBAR

	help
@@ -103,7 +136,6 @@ config M5206 
config M5206e

	bool "MCF5206e"

	depends on !MMU

	select COLDFIRE

	select COLDFIRE_SW_A7

	select HAVE_MBAR

	help
@@ -112,7 +144,6 @@ config M5206e 
config M520x

	bool "MCF520x"

	depends on !MMU

	select COLDFIRE

	select GENERIC_CLOCKEVENTS

	select HAVE_CACHE_SPLIT

	help
@@ -121,7 +152,6 @@ config M520x 
config M523x

	bool "MCF523x"

	depends on !MMU

	select COLDFIRE

	select GENERIC_CLOCKEVENTS

	select HAVE_CACHE_SPLIT

	select HAVE_IPSBAR
@@ -131,7 +161,6 @@ config M523x 
config M5249

	bool "MCF5249"

	depends on !MMU

	select COLDFIRE

	select COLDFIRE_SW_A7

	select HAVE_MBAR

	help
@@ -143,7 +172,6 @@ config M527x 
config M5271

	bool "MCF5271"

	depends on !MMU

	select COLDFIRE

	select M527x

	select HAVE_CACHE_SPLIT

	select HAVE_IPSBAR
@@ -154,7 +182,6 @@ config M5271 
config M5272

	bool "MCF5272"

	depends on !MMU

	select COLDFIRE

	select COLDFIRE_SW_A7

	select HAVE_MBAR

	help
@@ -163,7 +190,6 @@ config M5272 
config M5275

	bool "MCF5275"

	depends on !MMU

	select COLDFIRE

	select M527x

	select HAVE_CACHE_SPLIT

	select HAVE_IPSBAR
@@ -174,7 +200,6 @@ config M5275 
config M528x

	bool "MCF528x"

	depends on !MMU

	select COLDFIRE

	select GENERIC_CLOCKEVENTS

	select HAVE_CACHE_SPLIT

	select HAVE_IPSBAR
@@ -184,7 +209,6 @@ config M528x 
config M5307

	bool "MCF5307"

	depends on !MMU

	select COLDFIRE

	select COLDFIRE_SW_A7

	select HAVE_CACHE_CB

	select HAVE_MBAR
@@ -194,7 +218,6 @@ config M5307 
config M532x

	bool "MCF532x"

	depends on !MMU

	select COLDFIRE

	select HAVE_CACHE_CB

	help

	  Freescale (Motorola) ColdFire 532x processor support.
@@ -202,7 +225,6 @@ config M532x 
config M5407

	bool "MCF5407"

	depends on !MMU

	select COLDFIRE

	select COLDFIRE_SW_A7

	select HAVE_CACHE_CB

	select HAVE_MBAR
@@ -214,9 +236,8 @@ config M54xx 


config M547x

	bool "MCF547x"

	depends on !MMU

	select COLDFIRE

	select M54xx

	select MMU_COLDFIRE if MMU

	select HAVE_CACHE_CB

	select HAVE_MBAR

	help
@@ -224,14 +245,15 @@ config M547x 


config M548x

	bool "MCF548x"

	depends on !MMU

	select COLDFIRE

	select MMU_COLDFIRE if MMU

	select M54xx

	select HAVE_CACHE_CB

	select HAVE_MBAR

	help

	  Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.



endif # COLDFIRE





comment "Processor Specific Options"

arch/m68k/Kconfig.debug

+8 −8
Original line number Diff line number Diff line
@@ -2,6 +2,14 @@ menu "Kernel hacking" 


source "lib/Kconfig.debug"



config BOOTPARAM

	bool 'Compiled-in Kernel Boot Parameter'



config BOOTPARAM_STRING

	string 'Kernel Boot Parameter'

	default 'console=ttyS0,19200'

	depends on BOOTPARAM



if !MMU



config FULLDEBUG
@@ -15,14 +23,6 @@ config HIGHPROFILE 
	help

	  Use a fast secondary clock to produce profiling information.



config BOOTPARAM

	bool 'Compiled-in Kernel Boot Parameter'



config BOOTPARAM_STRING

	string 'Kernel Boot Parameter'

	default 'console=ttyS0,19200'

	depends on BOOTPARAM



config NO_KERNEL_MSG

	bool "Suppress Kernel BUG Messages"

	help

arch/m68k/Kconfig.machine

+4 −0
Original line number Diff line number Diff line 
comment "Machine Types"



if M68KCLASSIC



config AMIGA

	bool "Amiga support"

	depends on MMU
@@ -130,6 +132,8 @@ config SUN3 


	  If you don't want to compile a kernel exclusively for a Sun 3, say N.



endif # M68KCLASSIC



config PILOT

	bool

arch/m68k/include/asm/anchor.h

deleted100644 → 0
+0 −112
Original line number Diff line number Diff line 
/****************************************************************************/



/*

 *	anchor.h -- Anchor CO-MEM Lite PCI host bridge part.

 *

 *	(C) Copyright 2000, Moreton Bay (www.moreton.com.au)

 */



/****************************************************************************/

#ifndef	anchor_h

#define	anchor_h

/****************************************************************************/



/*

 *	Define basic addressing info.

 */

#if defined(CONFIG_M5407C3)

#define	COMEM_BASE	0xFFFF0000	/* Base of CO-MEM address space */

#define	COMEM_IRQ	25		/* IRQ of anchor part */

#else

#define	COMEM_BASE	0x80000000	/* Base of CO-MEM address space */

#define	COMEM_IRQ	25		/* IRQ of anchor part */

#endif



/****************************************************************************/



/*

 *	4-byte registers of CO-MEM, so adjust register addresses for

 *	easy access. Handy macro for word access too.

 */

#define	LREG(a)		((a) >> 2)

#define	WREG(a)		((a) >> 1)





/*

 *	Define base addresses within CO-MEM Lite register address space.

 */

#define	COMEM_I2O	0x0000		/* I2O registers */

#define	COMEM_OPREGS	0x0400		/* Operation registers */

#define	COMEM_PCIBUS	0x2000		/* Direct access to PCI bus */

#define	COMEM_SHMEM	0x4000		/* Shared memory region */



#define	COMEM_SHMEMSIZE	0x4000		/* Size of shared memory */





/*

 *	Define CO-MEM Registers.

 */

#define	COMEM_I2OHISR	0x0030		/* I2O host interrupt status */

#define	COMEM_I2OHIMR	0x0034		/* I2O host interrupt mask */

#define	COMEM_I2OLISR	0x0038		/* I2O local interrupt status */

#define	COMEM_I2OLIMR	0x003c		/* I2O local interrupt mask */

#define	COMEM_IBFPFIFO	0x0040		/* I2O inbound free/post FIFO */

#define	COMEM_OBPFFIFO	0x0044		/* I2O outbound post/free FIFO */

#define	COMEM_IBPFFIFO	0x0048		/* I2O inbound post/free FIFO */

#define	COMEM_OBFPFIFO	0x004c		/* I2O outbound free/post FIFO */



#define	COMEM_DAHBASE	0x0460		/* Direct access base address */



#define	COMEM_NVCMD	0x04a0		/* I2C serial command */

#define	COMEM_NVREAD	0x04a4		/* I2C serial read */

#define	COMEM_NVSTAT	0x04a8		/* I2C status */



#define	COMEM_DMALBASE	0x04b0		/* DMA local base address */

#define	COMEM_DMAHBASE	0x04b4		/* DMA host base address */

#define	COMEM_DMASIZE	0x04b8		/* DMA size */

#define	COMEM_DMACTL	0x04bc		/* DMA control */



#define	COMEM_HCTL	0x04e0		/* Host control */

#define	COMEM_HINT	0x04e4		/* Host interrupt control/status */

#define	COMEM_HLDATA	0x04e8		/* Host to local data mailbox */

#define	COMEM_LINT	0x04f4		/* Local interrupt contole status */

#define	COMEM_LHDATA	0x04f8		/* Local to host data mailbox */



#define	COMEM_LBUSCFG	0x04fc		/* Local bus configuration */





/*

 *	Commands and flags for use with Direct Access Register.

 */

#define	COMEM_DA_IACK	0x00000000	/* Interrupt acknowledge (read) */

#define	COMEM_DA_SPCL	0x00000010	/* Special cycle (write) */

#define	COMEM_DA_MEMRD	0x00000004	/* Memory read cycle */

#define	COMEM_DA_MEMWR	0x00000004	/* Memory write cycle */

#define	COMEM_DA_IORD	0x00000002	/* I/O read cycle */

#define	COMEM_DA_IOWR	0x00000002	/* I/O write cycle */

#define	COMEM_DA_CFGRD	0x00000006	/* Configuration read cycle */

#define	COMEM_DA_CFGWR	0x00000006	/* Configuration write cycle */



#define	COMEM_DA_ADDR(a)	((a) & 0xffffe000)



#define	COMEM_DA_OFFSET(a)	((a) & 0x00001fff)





/*

 *	The PCI bus will be limited in what slots will actually be used.

 *	Define valid device numbers for different boards.

 */

#if defined(CONFIG_M5407C3)

#define	COMEM_MINDEV	14		/* Minimum valid DEVICE */

#define	COMEM_MAXDEV	14		/* Maximum valid DEVICE */

#define	COMEM_BRIDGEDEV	15		/* Slot bridge is in */

#else

#define	COMEM_MINDEV	0		/* Minimum valid DEVICE */

#define	COMEM_MAXDEV	3		/* Maximum valid DEVICE */

#endif



#define	COMEM_MAXPCI	(COMEM_MAXDEV+1)	/* Maximum PCI devices */





/****************************************************************************/

#endif	/* anchor_h */