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Commit c745884b authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-fixes-4.5' of git://people.freedesktop.org/~agd5f/linux into drm-fixes 

- fix and enable iceland/topaz support
- handle WC on platforms that don't support it

* 'drm-fixes-4.5' of git://people.freedesktop.org/~agd5f/linux:
  drm/amdgpu: disable uvd and vce clockgating on Fiji
  drm/amdgpu: remove exp hardware support from iceland
  drm/amdgpu: load MEC ucode manually on iceland
  drm/amdgpu: don't load MEC2 on topaz
  drm/amdgpu: drop topaz support from gmc8 module
  drm/amdgpu: pull topaz gmc bits into gmc_v7
  drm/amdgpu: The VI specific EXE bit should only apply to GMC v8.0 above
  drm/amdgpu: iceland use CI based MC IP
  drm/amdgpu: move gmc7 support out of CIK dependency
  drm/amdgpu/gfx7: enable cp inst/reg error interrupts
  drm/amdgpu/gfx8: enable cp inst/reg error interrupts
  drm/amdgpu: mask out WC from BO on unsupported arches
  drm/radeon: mask out WC from BO on unsupported arches
  drm: add helper to check for wc memory support
  drm/amdgpu: no need to load MC firmware on fiji
parents ec71f128 6357b75a

drivers/gpu/drm/amd/amdgpu/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ 
	amdgpu_ucode.o amdgpu_bo_list.o amdgpu_ctx.o amdgpu_sync.o



# add asic specific block

amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o gmc_v7_0.o cik_ih.o kv_smc.o kv_dpm.o \

amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o cik_ih.o kv_smc.o kv_dpm.o \

	ci_smc.o ci_dpm.o dce_v8_0.o gfx_v7_0.o cik_sdma.o uvd_v4_2.o vce_v2_0.o \

	amdgpu_amdkfd_gfx_v7.o
@@ -34,6 +34,7 @@ amdgpu-y += \ 


# add GMC block

amdgpu-y += \

	gmc_v7_0.o \

	gmc_v8_0.o



# add IH block

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

+5 −5
Original line number Diff line number Diff line
@@ -256,11 +256,11 @@ static struct pci_device_id pciidlist[] = { 
	{0x1002, 0x985F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},

#endif

	/* topaz */

	{0x1002, 0x6900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ|AMD_EXP_HW_SUPPORT},

	{0x1002, 0x6901, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ|AMD_EXP_HW_SUPPORT},

	{0x1002, 0x6902, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ|AMD_EXP_HW_SUPPORT},

	{0x1002, 0x6903, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ|AMD_EXP_HW_SUPPORT},

	{0x1002, 0x6907, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ|AMD_EXP_HW_SUPPORT},

	{0x1002, 0x6900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},

	{0x1002, 0x6901, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},

	{0x1002, 0x6902, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},

	{0x1002, 0x6903, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},

	{0x1002, 0x6907, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},

	/* tonga */

	{0x1002, 0x6920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},

	{0x1002, 0x6921, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c

+8 −0
Original line number Diff line number Diff line
@@ -33,6 +33,7 @@ 
#include <linux/slab.h>

#include <drm/drmP.h>

#include <drm/amdgpu_drm.h>

#include <drm/drm_cache.h>

#include "amdgpu.h"

#include "amdgpu_trace.h"
@@ -261,6 +262,13 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev, 
				       AMDGPU_GEM_DOMAIN_OA);



	bo->flags = flags;



	/* For architectures that don't support WC memory,

	 * mask out the WC flag from the BO

	 */

	if (!drm_arch_can_wc_memory())

		bo->flags &= ~AMDGPU_GEM_CREATE_CPU_GTT_USWC;



	amdgpu_fill_placement_to_bo(bo, placement);

	/* Kernel allocation are uninterruptible */

	r = ttm_bo_init(&adev->mman.bdev, &bo->tbo, size, type,

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

+1 −1
Original line number Diff line number Diff line
@@ -808,7 +808,7 @@ uint32_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device *adev, struct ttm_tt *ttm, 
			flags |= AMDGPU_PTE_SNOOPED;

	}



	if (adev->asic_type >= CHIP_TOPAZ)

	if (adev->asic_type >= CHIP_TONGA)

		flags |= AMDGPU_PTE_EXECUTABLE;



	flags |= AMDGPU_PTE_READABLE;

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

+19 −1
Original line number Diff line number Diff line
@@ -4738,6 +4738,22 @@ static int gfx_v7_0_early_init(void *handle) 
	return 0;

}



static int gfx_v7_0_late_init(void *handle)

{

	struct amdgpu_device *adev = (struct amdgpu_device *)handle;

	int r;



	r = amdgpu_irq_get(adev, &adev->gfx.priv_reg_irq, 0);

	if (r)

		return r;



	r = amdgpu_irq_get(adev, &adev->gfx.priv_inst_irq, 0);

	if (r)

		return r;



	return 0;

}



static int gfx_v7_0_sw_init(void *handle)

{

	struct amdgpu_ring *ring;
@@ -4890,6 +4906,8 @@ static int gfx_v7_0_hw_fini(void *handle) 
{

	struct amdgpu_device *adev = (struct amdgpu_device *)handle;



	amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0);

	amdgpu_irq_put(adev, &adev->gfx.priv_inst_irq, 0);

	gfx_v7_0_cp_enable(adev, false);

	gfx_v7_0_rlc_stop(adev);

	gfx_v7_0_fini_pg(adev);
@@ -5527,7 +5545,7 @@ static int gfx_v7_0_set_powergating_state(void *handle, 


const struct amd_ip_funcs gfx_v7_0_ip_funcs = {

	.early_init = gfx_v7_0_early_init,

	.late_init = NULL,

	.late_init = gfx_v7_0_late_init,

	.sw_init = gfx_v7_0_sw_init,

	.sw_fini = gfx_v7_0_sw_fini,

	.hw_init = gfx_v7_0_hw_init,