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Commit c70efb85 authored by Mark Brown's avatar Mark Brown
Browse files

Merge remote-tracking branches 'spi/topic/s3c64xx', 'spi/topic/ti-qspi' and... 

Merge remote-tracking branches 'spi/topic/s3c64xx', 'spi/topic/ti-qspi' and 'spi/topic/txx9' into spi-next
parents 4c845185 88d4a744 e6b5140b fc306de9

drivers/spi/spi-s3c64xx.c

+31 −15
Original line number Diff line number Diff line
@@ -32,6 +32,7 @@ 
#define MAX_SPI_PORTS		6

#define S3C64XX_SPI_QUIRK_POLL		(1 << 0)

#define S3C64XX_SPI_QUIRK_CS_AUTO	(1 << 1)

#define AUTOSUSPEND_TIMEOUT	2000



/* Registers and bit-fields */
@@ -682,7 +683,7 @@ static int s3c64xx_spi_transfer_one(struct spi_master *master, 


	/* Only BPW and Speed may change across transfers */

	bpw = xfer->bits_per_word;

	speed = xfer->speed_hz ? : spi->max_speed_hz;

	speed = xfer->speed_hz;



	if (bpw != sdd->cur_bpw || speed != sdd->cur_speed) {

		sdd->cur_bpw = bpw;
@@ -859,13 +860,15 @@ static int s3c64xx_spi_setup(struct spi_device *spi) 
		}

	}



	pm_runtime_put(&sdd->pdev->dev);

	pm_runtime_mark_last_busy(&sdd->pdev->dev);

	pm_runtime_put_autosuspend(&sdd->pdev->dev);

	if (!(sdd->port_conf->quirks & S3C64XX_SPI_QUIRK_CS_AUTO))

		writel(S3C64XX_SPI_SLAVE_SIG_INACT, sdd->regs + S3C64XX_SPI_SLAVE_SEL);

	return 0;



setup_exit:

	pm_runtime_put(&sdd->pdev->dev);

	pm_runtime_mark_last_busy(&sdd->pdev->dev);

	pm_runtime_put_autosuspend(&sdd->pdev->dev);

	/* setup() returns with device de-selected */

	if (!(sdd->port_conf->quirks & S3C64XX_SPI_QUIRK_CS_AUTO))

		writel(S3C64XX_SPI_SLAVE_SIG_INACT, sdd->regs + S3C64XX_SPI_SLAVE_SEL);
@@ -1162,6 +1165,12 @@ static int s3c64xx_spi_probe(struct platform_device *pdev) 
		goto err2;

	}



	pm_runtime_set_autosuspend_delay(&pdev->dev, AUTOSUSPEND_TIMEOUT);

	pm_runtime_use_autosuspend(&pdev->dev);

	pm_runtime_set_active(&pdev->dev);

	pm_runtime_enable(&pdev->dev);

	pm_runtime_get_sync(&pdev->dev);



	/* Setup Deufult Mode */

	s3c64xx_spi_hwinit(sdd, sdd->port_id);
@@ -1180,9 +1189,6 @@ static int s3c64xx_spi_probe(struct platform_device *pdev) 
	       S3C64XX_SPI_INT_TX_OVERRUN_EN | S3C64XX_SPI_INT_TX_UNDERRUN_EN,

	       sdd->regs + S3C64XX_SPI_INT_EN);



	pm_runtime_set_active(&pdev->dev);

	pm_runtime_enable(&pdev->dev);



	ret = devm_spi_register_master(&pdev->dev, master);

	if (ret != 0) {

		dev_err(&pdev->dev, "cannot register SPI master: %d\n", ret);
@@ -1195,9 +1201,16 @@ static int s3c64xx_spi_probe(struct platform_device *pdev) 
					mem_res, (FIFO_LVL_MASK(sdd) >> 1) + 1,

					sdd->rx_dma.dmach, sdd->tx_dma.dmach);



	pm_runtime_mark_last_busy(&pdev->dev);

	pm_runtime_put_autosuspend(&pdev->dev);



	return 0;



err3:

	pm_runtime_put_noidle(&pdev->dev);

	pm_runtime_disable(&pdev->dev);

	pm_runtime_set_suspended(&pdev->dev);



	clk_disable_unprepare(sdd->src_clk);

err2:

	clk_disable_unprepare(sdd->clk);
@@ -1212,7 +1225,7 @@ static int s3c64xx_spi_remove(struct platform_device *pdev) 
	struct spi_master *master = spi_master_get(platform_get_drvdata(pdev));

	struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);



	pm_runtime_disable(&pdev->dev);

	pm_runtime_get_sync(&pdev->dev);



	writel(0, sdd->regs + S3C64XX_SPI_INT_EN);
@@ -1220,6 +1233,10 @@ static int s3c64xx_spi_remove(struct platform_device *pdev) 


	clk_disable_unprepare(sdd->clk);



	pm_runtime_put_noidle(&pdev->dev);

	pm_runtime_disable(&pdev->dev);

	pm_runtime_set_suspended(&pdev->dev);



	return 0;

}
@@ -1233,10 +1250,9 @@ static int s3c64xx_spi_suspend(struct device *dev) 
	if (ret)

		return ret;



	if (!pm_runtime_suspended(dev)) {

		clk_disable_unprepare(sdd->clk);

		clk_disable_unprepare(sdd->src_clk);

	}

	ret = pm_runtime_force_suspend(dev);

	if (ret < 0)

		return ret;



	sdd->cur_speed = 0; /* Output Clock is stopped */
@@ -1248,14 +1264,14 @@ static int s3c64xx_spi_resume(struct device *dev) 
	struct spi_master *master = dev_get_drvdata(dev);

	struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);

	struct s3c64xx_spi_info *sci = sdd->cntrlr_info;

	int ret;



	if (sci->cfg_gpio)

		sci->cfg_gpio();



	if (!pm_runtime_suspended(dev)) {

		clk_prepare_enable(sdd->src_clk);

		clk_prepare_enable(sdd->clk);

	}

	ret = pm_runtime_force_resume(dev);

	if (ret < 0)

		return ret;



	s3c64xx_spi_hwinit(sdd, sdd->port_id);

drivers/spi/spi-ti-qspi.c

+21 −64
Original line number Diff line number Diff line
@@ -39,8 +39,6 @@ struct ti_qspi_regs { 
};



struct ti_qspi {

	struct completion       transfer_complete;



	/* list synchronization */

	struct mutex            list_lock;
@@ -62,10 +60,6 @@ struct ti_qspi { 


#define QSPI_PID			(0x0)

#define QSPI_SYSCONFIG			(0x10)

#define QSPI_INTR_STATUS_RAW_SET	(0x20)

#define QSPI_INTR_STATUS_ENABLED_CLEAR	(0x24)

#define QSPI_INTR_ENABLE_SET_REG	(0x28)

#define QSPI_INTR_ENABLE_CLEAR_REG	(0x2c)

#define QSPI_SPI_CLOCK_CNTRL_REG	(0x40)

#define QSPI_SPI_DC_REG			(0x44)

#define QSPI_SPI_CMD_REG		(0x48)
@@ -97,7 +91,6 @@ struct ti_qspi { 
#define QSPI_RD_DUAL			(3 << 16)

#define QSPI_RD_QUAD			(7 << 16)

#define QSPI_INVAL			(4 << 16)

#define QSPI_WC_CMD_INT_EN			(1 << 14)

#define QSPI_FLEN(n)			((n - 1) << 0)

#define QSPI_WLEN_MAX_BITS		128

#define QSPI_WLEN_MAX_BYTES		16
@@ -106,10 +99,6 @@ struct ti_qspi { 
#define BUSY				0x01

#define WC				0x02



/* INTERRUPT REGISTER */

#define QSPI_WC_INT_EN				(1 << 1)

#define QSPI_WC_INT_DISABLE			(1 << 1)



/* Device Control */

#define QSPI_DD(m, n)			(m << (3 + n * 8))

#define QSPI_CKPHA(n)			(1 << (2 + n * 8))
@@ -217,6 +206,24 @@ static inline u32 qspi_is_busy(struct ti_qspi *qspi) 
	return stat & BUSY;

}



static inline int ti_qspi_poll_wc(struct ti_qspi *qspi)

{

	u32 stat;

	unsigned long timeout = jiffies + QSPI_COMPLETION_TIMEOUT;



	do {

		stat = ti_qspi_read(qspi, QSPI_SPI_STATUS_REG);

		if (stat & WC)

			return 0;

		cpu_relax();

	} while (time_after(timeout, jiffies));



	stat = ti_qspi_read(qspi, QSPI_SPI_STATUS_REG);

	if (stat & WC)

		return 0;

	return  -ETIMEDOUT;

}



static int qspi_write_msg(struct ti_qspi *qspi, struct spi_transfer *t)

{

	int wlen, count, xfer_len;
@@ -275,8 +282,7 @@ static int qspi_write_msg(struct ti_qspi *qspi, struct spi_transfer *t) 
		}



		ti_qspi_write(qspi, cmd, QSPI_SPI_CMD_REG);

		if (!wait_for_completion_timeout(&qspi->transfer_complete,

						 QSPI_COMPLETION_TIMEOUT)) {

		if (ti_qspi_poll_wc(qspi)) {

			dev_err(qspi->dev, "write timed out\n");

			return -ETIMEDOUT;

		}
@@ -315,8 +321,7 @@ static int qspi_read_msg(struct ti_qspi *qspi, struct spi_transfer *t) 
			return -EBUSY;



		ti_qspi_write(qspi, cmd, QSPI_SPI_CMD_REG);

		if (!wait_for_completion_timeout(&qspi->transfer_complete,

						 QSPI_COMPLETION_TIMEOUT)) {

		if (ti_qspi_poll_wc(qspi)) {

			dev_err(qspi->dev, "read timed out\n");

			return -ETIMEDOUT;

		}
@@ -388,9 +393,7 @@ static int ti_qspi_start_transfer_one(struct spi_master *master, 
	qspi->cmd = 0;

	qspi->cmd |= QSPI_EN_CS(spi->chip_select);

	qspi->cmd |= QSPI_FLEN(frame_length);

	qspi->cmd |= QSPI_WC_CMD_INT_EN;



	ti_qspi_write(qspi, QSPI_WC_INT_EN, QSPI_INTR_ENABLE_SET_REG);

	ti_qspi_write(qspi, qspi->dc, QSPI_SPI_DC_REG);



	mutex_lock(&qspi->list_lock);
@@ -417,31 +420,6 @@ static int ti_qspi_start_transfer_one(struct spi_master *master, 
	return status;

}



static irqreturn_t ti_qspi_isr(int irq, void *dev_id)

{

	struct ti_qspi *qspi = dev_id;

	u16 int_stat;

	u32 stat;



	irqreturn_t ret = IRQ_HANDLED;



	int_stat = ti_qspi_read(qspi, QSPI_INTR_STATUS_ENABLED_CLEAR);

	stat = ti_qspi_read(qspi, QSPI_SPI_STATUS_REG);



	if (!int_stat) {

		dev_dbg(qspi->dev, "No IRQ triggered\n");

		ret = IRQ_NONE;

		goto out;

	}



	ti_qspi_write(qspi, QSPI_WC_INT_DISABLE,

				QSPI_INTR_STATUS_ENABLED_CLEAR);

	if (stat & WC)

		complete(&qspi->transfer_complete);

out:

	return ret;

}



static int ti_qspi_runtime_resume(struct device *dev)

{

	struct ti_qspi      *qspi;
@@ -550,22 +528,12 @@ static int ti_qspi_probe(struct platform_device *pdev) 
		}

	}



	ret = devm_request_irq(&pdev->dev, irq, ti_qspi_isr, 0,

			dev_name(&pdev->dev), qspi);

	if (ret < 0) {

		dev_err(&pdev->dev, "Failed to register ISR for IRQ %d\n",

				irq);

		goto free_master;

	}



	qspi->fclk = devm_clk_get(&pdev->dev, "fck");

	if (IS_ERR(qspi->fclk)) {

		ret = PTR_ERR(qspi->fclk);

		dev_err(&pdev->dev, "could not get clk: %d\n", ret);

	}



	init_completion(&qspi->transfer_complete);



	pm_runtime_use_autosuspend(&pdev->dev);

	pm_runtime_set_autosuspend_delay(&pdev->dev, QSPI_AUTOSUSPEND_TIMEOUT);

	pm_runtime_enable(&pdev->dev);
@@ -586,18 +554,7 @@ static int ti_qspi_probe(struct platform_device *pdev) 


static int ti_qspi_remove(struct platform_device *pdev)

{

	struct ti_qspi *qspi = platform_get_drvdata(pdev);

	int ret;



	ret = pm_runtime_get_sync(qspi->dev);

	if (ret < 0) {

		dev_err(qspi->dev, "pm_runtime_get_sync() failed\n");

		return ret;

	}



	ti_qspi_write(qspi, QSPI_WC_INT_DISABLE, QSPI_INTR_ENABLE_CLEAR_REG);



	pm_runtime_put(qspi->dev);

	pm_runtime_put_sync(&pdev->dev);

	pm_runtime_disable(&pdev->dev);



	return 0;

drivers/spi/spi-txx9.c

+1 −1
Original line number Diff line number Diff line
@@ -181,7 +181,7 @@ static void txx9spi_work_one(struct txx9spi *c, struct spi_message *m) 
		u32 data;

		unsigned int len = t->len;

		unsigned int wsize;

		u32 speed_hz = t->speed_hz ? : spi->max_speed_hz;

		u32 speed_hz = t->speed_hz;

		u8 bits_per_word = t->bits_per_word;



		wsize = bits_per_word >> 3; /* in bytes */