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Commit c6882fb2 authored by Thor Thayer's avatar Thor Thayer Committed by Borislav Petkov
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EDAC, altera: Add Arria10 NAND support 



Add Altera Arria10 NAND FIFO memory support.

Signed-off-by: default avatarThor Thayer <tthayer@opensource.altera.com>
Cc: dinguyen@opensource.altera.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1468512408-5156-6-git-send-email-tthayer@opensource.altera.com


[ Reformat loop in altr_edac_a10_probe() for better readability. ]
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
parent d61d96f1

drivers/edac/Kconfig

+7 −0
Original line number Diff line number Diff line
@@ -398,6 +398,13 @@ config EDAC_ALTERA_ETHERNET 
	  Support for error detection and correction on the

	  Altera Ethernet FIFO Memory for Altera SoCs.



config EDAC_ALTERA_NAND

	bool "Altera NAND FIFO ECC"

	depends on EDAC_ALTERA=y && MTD_NAND_DENALI

	help

	  Support for error detection and correction on the

	  Altera NAND FIFO Memory for Altera SoCs.



config EDAC_SYNOPSYS

	tristate "Synopsys DDR Memory Controller"

	depends on EDAC_MM_EDAC && ARCH_ZYNQ

drivers/edac/altera_edac.c

+38 −8
Original line number Diff line number Diff line
@@ -1285,6 +1285,33 @@ early_initcall(socfpga_init_ethernet_ecc); 


#endif	/* CONFIG_EDAC_ALTERA_ETHERNET */



/********************** NAND Device Functions **********************/



#ifdef CONFIG_EDAC_ALTERA_NAND



static const struct edac_device_prv_data a10_nandecc_data = {

	.setup = altr_check_ecc_deps,

	.ce_clear_mask = ALTR_A10_ECC_SERRPENA,

	.ue_clear_mask = ALTR_A10_ECC_DERRPENA,

	.dbgfs_name = "altr_trigger",

	.ecc_enable_mask = ALTR_A10_COMMON_ECC_EN_CTL,

	.ecc_en_ofst = ALTR_A10_ECC_CTRL_OFST,

	.ce_set_mask = ALTR_A10_ECC_TSERRA,

	.ue_set_mask = ALTR_A10_ECC_TDERRA,

	.set_err_ofst = ALTR_A10_ECC_INTTEST_OFST,

	.ecc_irq_handler = altr_edac_a10_ecc_irq,

	.inject_fops = &altr_edac_a10_device_inject_fops,

};



static int __init socfpga_init_nand_ecc(void)

{

	return altr_init_a10_ecc_device_type("altr,socfpga-nand-ecc");

}



early_initcall(socfpga_init_nand_ecc);



#endif	/* CONFIG_EDAC_ALTERA_NAND */



/********************* Arria10 EDAC Device Functions *************************/

static const struct of_device_id altr_edac_a10_device_of_match[] = {

#ifdef CONFIG_EDAC_ALTERA_L2C
@@ -1297,6 +1324,9 @@ static const struct of_device_id altr_edac_a10_device_of_match[] = { 
#ifdef CONFIG_EDAC_ALTERA_ETHERNET

	{ .compatible = "altr,socfpga-eth-mac-ecc",

	  .data = &a10_enetecc_data },

#endif

#ifdef CONFIG_EDAC_ALTERA_NAND

	{ .compatible = "altr,socfpga-nand-ecc", .data = &a10_nandecc_data },

#endif

	{},

};
@@ -1584,15 +1614,15 @@ static int altr_edac_a10_probe(struct platform_device *pdev) 
	for_each_child_of_node(pdev->dev.of_node, child) {

		if (!of_device_is_available(child))

			continue;

		if (of_device_is_compatible(child, "altr,socfpga-a10-l2-ecc"))

			altr_edac_a10_device_add(edac, child);

		else if ((of_device_is_compatible(child,

					"altr,socfpga-a10-ocram-ecc")) ||

			 (of_device_is_compatible(child,

					"altr,socfpga-eth-mac-ecc")))



		if (of_device_is_compatible(child, "altr,socfpga-a10-l2-ecc") || 

		    of_device_is_compatible(child, "altr,socfpga-a10-ocram-ecc") ||

		    of_device_is_compatible(child, "altr,socfpga-eth-mac-ecc") ||

		    of_device_is_compatible(child, "altr,socfpga-nand-ecc"))



			altr_edac_a10_device_add(edac, child);

		else if (of_device_is_compatible(child,

						 "altr,sdram-edac-a10"))



		else if (of_device_is_compatible(child, "altr,sdram-edac-a10"))

			of_platform_populate(pdev->dev.of_node,

					     altr_sdram_ctrl_of_match,

					     NULL, &pdev->dev);