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Commit c64f9762 authored by Mark Brown's avatar Mark Brown
Browse files

Merge tag 'asoc-v4.7' into asoc-linus 

ASoC: Updates for v4.7

The updates this time around are almost all driver code:

 - Further slow progress on the topology code.
 - Substantial updates and improvements for the da7219, es8328, fsl-ssi
   Intel and rcar drivers.

# gpg: Signature made Mon 16 May 2016 12:08:43 BST using RSA key ID 5D5487D0
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# gpg:                 aka "Mark Brown <broonie@debian.org>"
# gpg:                 aka "Mark Brown <broonie@kernel.org>"
# gpg:                 aka "Mark Brown <broonie@tardis.ed.ac.uk>"
# gpg:                 aka "Mark Brown <broonie@linaro.org>"
# gpg:                 aka "Mark Brown <Mark.Brown@linaro.org>"
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parents 2dcd0af5 515511a7

Documentation/devicetree/bindings/sound/davinci-mcbsp.txt

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Texas Instruments DaVinci McBSP module

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~



This binding describes the "Multi-channel Buffered Serial Port" (McBSP)

audio interface found in some TI DaVinci processors like the OMAP-L138 or AM180x.





Required properties:

~~~~~~~~~~~~~~~~~~~~

- compatible :

        "ti,da850-mcbsp" : for DA850, AM180x and OPAM-L138 platforms



- reg : physical base address and length of the controller memory mapped

        region(s).

- reg-names : Should contain:

        * "mpu" for the main registers (required).

        * "dat" for the data FIFO (optional).



- dmas: three element list of DMA controller phandles, DMA request line and

	TC channel ordered triplets.

- dma-names: identifier string for each DMA request line in the dmas property.

	These strings correspond 1:1 with the ordered pairs in dmas. The dma

	identifiers must be "rx" and "tx".



Optional properties:

~~~~~~~~~~~~~~~~~~~~

- interrupts : Interrupt numbers for McBSP

- interrupt-names : Known interrupt names are "rx" and "tx"



- pinctrl-0: Should specify pin control group used for this controller.

- pinctrl-names: Should contain only one value - "default", for more details

        please refer to pinctrl-bindings.txt



Example (AM1808):

~~~~~~~~~~~~~~~~~



mcbsp0: mcbsp@1d10000 {

	compatible = "ti,da850-mcbsp";

	pinctrl-names = "default";

	pinctrl-0 = <&mcbsp0_pins>;



	reg = 	<0x00110000 0x1000>,

		<0x00310000 0x1000>;

	reg-names = "mpu", "dat";

	interrupts = <97 98>;

	interrupts-names = "rx", "tx";

	dmas = <&edma0 3 1

		&edma0 2 1>;

	dma-names = "tx", "rx";

	status = "okay";

};

Documentation/devicetree/bindings/sound/fsl-sai.txt

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@@ -7,8 +7,8 @@ codec/DSP interfaces. 


Required properties:



  - compatible		: Compatible list, contains "fsl,vf610-sai" or

			  "fsl,imx6sx-sai".

  - compatible		: Compatible list, contains "fsl,vf610-sai",

			  "fsl,imx6sx-sai" or "fsl,imx6ul-sai"



  - reg			: Offset and length of the register set for the device.
@@ -48,6 +48,11 @@ Required properties: 
			  receive data by following their own bit clocks and

			  frame sync clocks separately.



Optional properties (for mx6ul):



  - fsl,sai-mclk-direction-output: This is a boolean property. If present,

			 indicates that SAI will output the SAI MCLK clock.



Note:

- If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the

  default synchronous mode (sync Rx with Tx) will be used, which means both

Documentation/devicetree/bindings/sound/pcm5102a.txt

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PCM5102a audio CODECs



These devices does not use I2C or SPI.



Required properties:



  - compatible : set as "ti,pcm5102a"



Examples:



	pcm5102a: pcm5102a {

		compatible = "ti,pcm5102a";

	};

MAINTAINERS

+1 −0
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@@ -4661,6 +4661,7 @@ FREESCALE SOC SOUND DRIVERS 
M:	Timur Tabi <timur@tabi.org>

M:	Nicolin Chen <nicoleotsuka@gmail.com>

M:	Xiubo Li <Xiubo.Lee@gmail.com>

R:	Fabio Estevam <fabio.estevam@nxp.com>

L:	alsa-devel@alsa-project.org (moderated for non-subscribers)

L:	linuxppc-dev@lists.ozlabs.org

S:	Maintained

include/linux/mfd/syscon/imx6q-iomuxc-gpr.h

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@@ -447,5 +447,11 @@ 
#define IMX6UL_GPR1_ENET2_CLK_OUTPUT		(0x1 << 18)

#define IMX6UL_GPR1_ENET_CLK_DIR		(0x3 << 17)

#define IMX6UL_GPR1_ENET_CLK_OUTPUT		(0x3 << 17)

#define IMX6UL_GPR1_SAI1_MCLK_DIR		(0x1 << 19)

#define IMX6UL_GPR1_SAI2_MCLK_DIR		(0x1 << 20)

#define IMX6UL_GPR1_SAI3_MCLK_DIR		(0x1 << 21)

#define IMX6UL_GPR1_SAI_MCLK_MASK		(0x7 << 19)

#define MCLK_DIR(x) (x == 1 ? IMX6UL_GPR1_SAI1_MCLK_DIR : x == 2 ? \

		     IMX6UL_GPR1_SAI2_MCLK_DIR : IMX6UL_GPR1_SAI3_MCLK_DIR)



#endif /* __LINUX_IMX6Q_IOMUXC_GPR_H */