Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit c3b1c2de authored by Kumba's avatar Kumba Committed by Ralf Baechle
Browse files

[MIPS] Fix R4K cache macro names 



Several machines have the R4K cache macro name spelled incorrectly.  Namely,
they have cpu_has_4kcache defined instead of cpu_has_4k_cache.

Signed-off-by: default avatarJoshua Kinard <kumba@gentoo.org>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 2493921c

include/asm-mips/mach-ip22/cpu-feature-overrides.h

+1 −1
Original line number Diff line number Diff line
@@ -13,7 +13,7 @@ 
 */

#define cpu_has_tlb		1

#define cpu_has_4kex		1

#define cpu_has_4kcache		1

#define cpu_has_4k_cache	1

#define cpu_has_fpu		1

#define cpu_has_32fpr		1

#define cpu_has_counter		1

include/asm-mips/mach-mips/cpu-feature-overrides.h

+2 −2
Original line number Diff line number Diff line
@@ -17,7 +17,7 @@ 
#ifdef CONFIG_CPU_MIPS32

#define cpu_has_tlb		1

#define cpu_has_4kex		1

#define cpu_has_4kcache		1

#define cpu_has_4k_cache	1

/* #define cpu_has_fpu		? */

/* #define cpu_has_32fpr	? */

#define cpu_has_counter		1
@@ -47,7 +47,7 @@ 
#ifdef CONFIG_CPU_MIPS64

#define cpu_has_tlb		1

#define cpu_has_4kex		1

#define cpu_has_4kcache		1

#define cpu_has_4k_cache	1

/* #define cpu_has_fpu		? */

/* #define cpu_has_32fpr	? */

#define cpu_has_counter		1

include/asm-mips/mach-rm200/cpu-feature-overrides.h

+1 −1
Original line number Diff line number Diff line
@@ -14,7 +14,7 @@ 


#define cpu_has_tlb		1

#define cpu_has_4kex		1

#define cpu_has_4kcache		1

#define cpu_has_4k_cache	1

#define cpu_has_fpu		1

#define cpu_has_32fpr		1

#define cpu_has_counter		1

include/asm-mips/mach-sim/cpu-feature-overrides.h

+2 −2
Original line number Diff line number Diff line
@@ -16,7 +16,7 @@ 
#ifdef CONFIG_CPU_MIPS32

#define cpu_has_tlb		1

#define cpu_has_4kex		1

#define cpu_has_4kcache		1

#define cpu_has_4k_cache	1

#define cpu_has_fpu		0

/* #define cpu_has_32fpr	? */

#define cpu_has_counter		1
@@ -41,7 +41,7 @@ 
#ifdef CONFIG_CPU_MIPS64

#define cpu_has_tlb		1

#define cpu_has_4kex		1

#define cpu_has_4kcache		1

#define cpu_has_4k_cache	1

/* #define cpu_has_fpu		? */

/* #define cpu_has_32fpr	? */

#define cpu_has_counter		1