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Commit c38c651b authored by Tvrtko Ursulin's avatar Tvrtko Ursulin
Browse files

drm/i915: Compact gen8_ring_sync 



Store the semaphore offset in a temporary variable to avoid
having to get the VMA offset twice.

Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 1b9e6650

drivers/gpu/drm/i915/intel_ringbuffer.c

+3 −4
Original line number Original line Diff line number Diff line
@@ -1547,6 +1547,7 @@ gen8_ring_sync(struct drm_i915_gem_request *waiter_req, 
{

{

	struct intel_engine_cs *waiter = waiter_req->engine;

	struct intel_engine_cs *waiter = waiter_req->engine;

	struct drm_i915_private *dev_priv = waiter_req->i915;

	struct drm_i915_private *dev_priv = waiter_req->i915;

	u64 offset = GEN8_WAIT_OFFSET(waiter, signaller->id);

	struct i915_hw_ppgtt *ppgtt;

	struct i915_hw_ppgtt *ppgtt;

	int ret;

	int ret;
@@ -1558,10 +1559,8 @@ gen8_ring_sync(struct drm_i915_gem_request *waiter_req, 
				MI_SEMAPHORE_GLOBAL_GTT |

				MI_SEMAPHORE_GLOBAL_GTT |

				MI_SEMAPHORE_SAD_GTE_SDD);

				MI_SEMAPHORE_SAD_GTE_SDD);

	intel_ring_emit(waiter, seqno);

	intel_ring_emit(waiter, seqno);

	intel_ring_emit(waiter,

	intel_ring_emit(waiter, lower_32_bits(offset));

			lower_32_bits(GEN8_WAIT_OFFSET(waiter, signaller->id)));

	intel_ring_emit(waiter, upper_32_bits(offset));

	intel_ring_emit(waiter,

			upper_32_bits(GEN8_WAIT_OFFSET(waiter, signaller->id)));

	intel_ring_advance(waiter);

	intel_ring_advance(waiter);





	/* When the !RCS engines idle waiting upon a semaphore, they lose their

	/* When the !RCS engines idle waiting upon a semaphore, they lose their