Loading arch/arm/mach-omap1/sram.S +3 −3 Original line number Diff line number Diff line Loading @@ -18,7 +18,7 @@ /* * Reprograms ULPD and CKCTL. */ ENTRY(sram_reprogram_clock) ENTRY(omap1_sram_reprogram_clock) stmfd sp!, {r0 - r12, lr} @ save registers on stack mov r2, #IO_ADDRESS(DPLL_CTL) & 0xff000000 Loading Loading @@ -53,5 +53,5 @@ lock: ldrh r4, [r2], #0 @ read back dpll value out: ldmfd sp!, {r0 - r12, pc} @ restore regs and return ENTRY(sram_reprogram_clock_sz) .word . - sram_reprogram_clock ENTRY(omap1_sram_reprogram_clock_sz) .word . - omap1_sram_reprogram_clock arch/arm/mach-omap2/Makefile +5 −1 Original line number Diff line number Diff line Loading @@ -3,9 +3,13 @@ # # Common support obj-y := irq.o id.o io.o sram242x.o memory.o control.o prcm.o clock.o mux.o \ obj-y := irq.o id.o io.o memory.o control.o prcm.o clock.o mux.o \ devices.o serial.o gpmc.o timer-gp.o # Functions loaded to SRAM obj-$(CONFIG_ARCH_OMAP2420) += sram242x.o obj-$(CONFIG_ARCH_OMAP2430) += sram243x.o # Power Management obj-$(CONFIG_PM) += pm.o sleep.o Loading arch/arm/mach-omap2/clock.c +2 −1 Original line number Diff line number Diff line Loading @@ -603,7 +603,8 @@ int omap2_clksel_set_rate(struct clk *clk, unsigned long rate) clk->rate = clk->parent->rate / new_div; if (clk->flags & DELAYED_APP && cpu_is_omap24xx()) { __raw_writel(OMAP24XX_VALID_CONFIG, OMAP24XX_PRCM_CLKCFG_CTRL); prm_write_mod_reg(OMAP24XX_VALID_CONFIG, OMAP24XX_GR_MOD, OMAP24XX_PRCM_CLKCFG_CTRL_OFFSET); wmb(); } Loading arch/arm/mach-omap2/prcm-common.h +1 −0 Original line number Diff line number Diff line Loading @@ -32,6 +32,7 @@ /* Chip-specific module offsets */ #define OMAP24XX_GR_MOD OCP_MOD #define OMAP24XX_DSP_MOD 0x800 #define OMAP2430_MDM_MOD 0xc00 Loading arch/arm/mach-omap2/prm.h +17 −1 Original line number Diff line number Diff line Loading @@ -38,13 +38,29 @@ * */ /* Global 24xx registers in GR_MOD (Same as OCP_MOD for 24xx) */ #define OMAP24XX_PRCM_VOLTCTRL_OFFSET 0x0050 #define OMAP24XX_PRCM_CLKCFG_CTRL_OFFSET 0x0080 /* 242x GR_MOD registers, use these only for assembly code */ #define OMAP242X_PRCM_VOLTCTRL OMAP2420_PRM_REGADDR(OMAP24XX_GR_MOD, \ OMAP24XX_PRCM_VOLTCTRL_OFFSET) #define OMAP242X_PRCM_CLKCFG_CTRL OMAP2420_PRM_REGADDR(OMAP24XX_GR_MOD, \ OMAP24XX_PRCM_CLKCFG_CTRL_OFFSET) /* 243x GR_MOD registers, use these only for assembly code */ #define OMAP243X_PRCM_VOLTCTRL OMAP2430_PRM_REGADDR(OMAP24XX_GR_MOD, \ OMAP24XX_PRCM_VOLTCTRL_OFFSET) #define OMAP243X_PRCM_CLKCFG_CTRL OMAP2430_PRM_REGADDR(OMAP24XX_GR_MOD, \ OMAP24XX_PRCM_CLKCFG_CTRL_OFFSET) /* These will disappear */ #define OMAP24XX_PRCM_REVISION OMAP_PRM_REGADDR(OCP_MOD, 0x0000) #define OMAP24XX_PRCM_SYSCONFIG OMAP_PRM_REGADDR(OCP_MOD, 0x0010) #define OMAP24XX_PRCM_IRQSTATUS_MPU OMAP_PRM_REGADDR(OCP_MOD, 0x0018) #define OMAP24XX_PRCM_IRQENABLE_MPU OMAP_PRM_REGADDR(OCP_MOD, 0x001c) #define OMAP24XX_PRCM_VOLTCTRL OMAP_PRM_REGADDR(OCP_MOD, 0x0050) #define OMAP24XX_PRCM_VOLTST OMAP_PRM_REGADDR(OCP_MOD, 0x0054) #define OMAP24XX_PRCM_CLKSRC_CTRL OMAP_PRM_REGADDR(OCP_MOD, 0x0060) #define OMAP24XX_PRCM_CLKOUT_CTRL OMAP_PRM_REGADDR(OCP_MOD, 0x0070) Loading Loading
arch/arm/mach-omap1/sram.S +3 −3 Original line number Diff line number Diff line Loading @@ -18,7 +18,7 @@ /* * Reprograms ULPD and CKCTL. */ ENTRY(sram_reprogram_clock) ENTRY(omap1_sram_reprogram_clock) stmfd sp!, {r0 - r12, lr} @ save registers on stack mov r2, #IO_ADDRESS(DPLL_CTL) & 0xff000000 Loading Loading @@ -53,5 +53,5 @@ lock: ldrh r4, [r2], #0 @ read back dpll value out: ldmfd sp!, {r0 - r12, pc} @ restore regs and return ENTRY(sram_reprogram_clock_sz) .word . - sram_reprogram_clock ENTRY(omap1_sram_reprogram_clock_sz) .word . - omap1_sram_reprogram_clock
arch/arm/mach-omap2/Makefile +5 −1 Original line number Diff line number Diff line Loading @@ -3,9 +3,13 @@ # # Common support obj-y := irq.o id.o io.o sram242x.o memory.o control.o prcm.o clock.o mux.o \ obj-y := irq.o id.o io.o memory.o control.o prcm.o clock.o mux.o \ devices.o serial.o gpmc.o timer-gp.o # Functions loaded to SRAM obj-$(CONFIG_ARCH_OMAP2420) += sram242x.o obj-$(CONFIG_ARCH_OMAP2430) += sram243x.o # Power Management obj-$(CONFIG_PM) += pm.o sleep.o Loading
arch/arm/mach-omap2/clock.c +2 −1 Original line number Diff line number Diff line Loading @@ -603,7 +603,8 @@ int omap2_clksel_set_rate(struct clk *clk, unsigned long rate) clk->rate = clk->parent->rate / new_div; if (clk->flags & DELAYED_APP && cpu_is_omap24xx()) { __raw_writel(OMAP24XX_VALID_CONFIG, OMAP24XX_PRCM_CLKCFG_CTRL); prm_write_mod_reg(OMAP24XX_VALID_CONFIG, OMAP24XX_GR_MOD, OMAP24XX_PRCM_CLKCFG_CTRL_OFFSET); wmb(); } Loading
arch/arm/mach-omap2/prcm-common.h +1 −0 Original line number Diff line number Diff line Loading @@ -32,6 +32,7 @@ /* Chip-specific module offsets */ #define OMAP24XX_GR_MOD OCP_MOD #define OMAP24XX_DSP_MOD 0x800 #define OMAP2430_MDM_MOD 0xc00 Loading
arch/arm/mach-omap2/prm.h +17 −1 Original line number Diff line number Diff line Loading @@ -38,13 +38,29 @@ * */ /* Global 24xx registers in GR_MOD (Same as OCP_MOD for 24xx) */ #define OMAP24XX_PRCM_VOLTCTRL_OFFSET 0x0050 #define OMAP24XX_PRCM_CLKCFG_CTRL_OFFSET 0x0080 /* 242x GR_MOD registers, use these only for assembly code */ #define OMAP242X_PRCM_VOLTCTRL OMAP2420_PRM_REGADDR(OMAP24XX_GR_MOD, \ OMAP24XX_PRCM_VOLTCTRL_OFFSET) #define OMAP242X_PRCM_CLKCFG_CTRL OMAP2420_PRM_REGADDR(OMAP24XX_GR_MOD, \ OMAP24XX_PRCM_CLKCFG_CTRL_OFFSET) /* 243x GR_MOD registers, use these only for assembly code */ #define OMAP243X_PRCM_VOLTCTRL OMAP2430_PRM_REGADDR(OMAP24XX_GR_MOD, \ OMAP24XX_PRCM_VOLTCTRL_OFFSET) #define OMAP243X_PRCM_CLKCFG_CTRL OMAP2430_PRM_REGADDR(OMAP24XX_GR_MOD, \ OMAP24XX_PRCM_CLKCFG_CTRL_OFFSET) /* These will disappear */ #define OMAP24XX_PRCM_REVISION OMAP_PRM_REGADDR(OCP_MOD, 0x0000) #define OMAP24XX_PRCM_SYSCONFIG OMAP_PRM_REGADDR(OCP_MOD, 0x0010) #define OMAP24XX_PRCM_IRQSTATUS_MPU OMAP_PRM_REGADDR(OCP_MOD, 0x0018) #define OMAP24XX_PRCM_IRQENABLE_MPU OMAP_PRM_REGADDR(OCP_MOD, 0x001c) #define OMAP24XX_PRCM_VOLTCTRL OMAP_PRM_REGADDR(OCP_MOD, 0x0050) #define OMAP24XX_PRCM_VOLTST OMAP_PRM_REGADDR(OCP_MOD, 0x0054) #define OMAP24XX_PRCM_CLKSRC_CTRL OMAP_PRM_REGADDR(OCP_MOD, 0x0060) #define OMAP24XX_PRCM_CLKOUT_CTRL OMAP_PRM_REGADDR(OCP_MOD, 0x0070) Loading