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Commit c29f5ec0 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp 

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: (26 commits)
  amd64_edac: add MAINTAINERS entry
  EDAC: do not enable modules by default
  amd64_edac: do not enable module by default
  amd64_edac: add module registration routines
  amd64_edac: add ECC reporting initializers
  amd64_edac: add EDAC core-related initializers
  amd64_edac: add error decoding logic
  amd64_edac: add ECC chipkill syndrome mapping table
  amd64_edac: add per-family descriptors
  amd64_edac: add F10h-and-later methods-p3
  amd64_edac: add F10h-and-later methods-p2
  amd64_edac: add F10h-and-later methods-p1
  amd64_edac: add k8-specific methods
  amd64_edac: assign DRAM chip select base and mask in a family-specific way
  amd64_edac: add helper to dump relevant registers
  amd64_edac: add DRAM address type conversion facilities
  amd64_edac: add functionality to compute the DRAM hole
  amd64_edac: add sys addr to memory controller mapping helpers
  amd64_edac: add memory scrubber interface
  amd64_edac: add MCA error types
  ...
parents d3d07d94 c476c23b

MAINTAINERS

+10 −0
Original line number Diff line number Diff line
@@ -1979,6 +1979,16 @@ F: Documentation/edac.txt 
F:	drivers/edac/edac_*

F:	include/linux/edac.h



EDAC-AMD64

P:	Doug Thompson

M:	dougthompson@xmission.com

P:	Borislav Petkov

M:	borislav.petkov@amd.com

L:	bluesmoke-devel@lists.sourceforge.net (moderated for non-subscribers)

W:	bluesmoke.sourceforge.net

S:	Supported

F:	drivers/edac/amd64_edac*



EDAC-E752X

P:	Mark Gross

M:	mark.gross@intel.com

arch/x86/include/asm/msr.h

+23 −0
Original line number Diff line number Diff line
@@ -12,6 +12,17 @@ 


#include <asm/asm.h>

#include <asm/errno.h>

#include <asm/cpumask.h>



struct msr {

	union {

		struct {

			u32 l;

			u32 h;

		};

		u64 q;

	};

};



static inline unsigned long long native_read_tscp(unsigned int *aux)

{
@@ -216,6 +227,8 @@ do { \ 
#ifdef CONFIG_SMP

int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);

int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);

void rdmsr_on_cpus(const cpumask_t *mask, u32 msr_no, struct msr *msrs);

void wrmsr_on_cpus(const cpumask_t *mask, u32 msr_no, struct msr *msrs);

int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);

int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);

#else  /*  CONFIG_SMP  */
@@ -229,6 +242,16 @@ static inline int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h) 
	wrmsr(msr_no, l, h);

	return 0;

}

static inline void rdmsr_on_cpus(const cpumask_t *m, u32 msr_no,

				struct msr *msrs)

{

       rdmsr_on_cpu(0, msr_no, &(msrs[0].l), &(msrs[0].h));

}

static inline void wrmsr_on_cpus(const cpumask_t *m, u32 msr_no,

				struct msr *msrs)

{

       wrmsr_on_cpu(0, msr_no, msrs[0].l, msrs[0].h);

}

static inline int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no,

				    u32 *l, u32 *h)

{

arch/x86/lib/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -2,7 +2,7 @@ 
# Makefile for x86 specific library files.

#



obj-$(CONFIG_SMP) := msr-on-cpu.o

obj-$(CONFIG_SMP) := msr.o



lib-y := delay.o

lib-y += thunk_$(BITS).o

arch/x86/lib/msr-on-cpu.c→arch/x86/lib/msr.c

+183 −0
Original line number Diff line number Diff line
@@ -5,22 +5,38 @@ 


struct msr_info {

	u32 msr_no;

	u32 l, h;

	struct msr reg;

	struct msr *msrs;

	int off;

	int err;

};



static void __rdmsr_on_cpu(void *info)

{

	struct msr_info *rv = info;

	struct msr *reg;

	int this_cpu = raw_smp_processor_id();



	rdmsr(rv->msr_no, rv->l, rv->h);

	if (rv->msrs)

		reg = &rv->msrs[this_cpu - rv->off];

	else

		reg = &rv->reg;



	rdmsr(rv->msr_no, reg->l, reg->h);

}



static void __wrmsr_on_cpu(void *info)

{

	struct msr_info *rv = info;

	struct msr *reg;

	int this_cpu = raw_smp_processor_id();



	if (rv->msrs)

		reg = &rv->msrs[this_cpu - rv->off];

	else

		reg = &rv->reg;



	wrmsr(rv->msr_no, rv->l, rv->h);

	wrmsr(rv->msr_no, reg->l, reg->h);

}



int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
@@ -28,26 +44,95 @@ int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h) 
	int err;

	struct msr_info rv;



	memset(&rv, 0, sizeof(rv));



	rv.msr_no = msr_no;

	err = smp_call_function_single(cpu, __rdmsr_on_cpu, &rv, 1);

	*l = rv.l;

	*h = rv.h;

	*l = rv.reg.l;

	*h = rv.reg.h;



	return err;

}

EXPORT_SYMBOL(rdmsr_on_cpu);



int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)

{

	int err;

	struct msr_info rv;



	memset(&rv, 0, sizeof(rv));



	rv.msr_no = msr_no;

	rv.l = l;

	rv.h = h;

	rv.reg.l = l;

	rv.reg.h = h;

	err = smp_call_function_single(cpu, __wrmsr_on_cpu, &rv, 1);



	return err;

}

EXPORT_SYMBOL(wrmsr_on_cpu);



/* rdmsr on a bunch of CPUs

 *

 * @mask:       which CPUs

 * @msr_no:     which MSR

 * @msrs:       array of MSR values

 *

 */

void rdmsr_on_cpus(const cpumask_t *mask, u32 msr_no, struct msr *msrs)

{

	struct msr_info rv;

	int this_cpu;



	memset(&rv, 0, sizeof(rv));



	rv.off    = cpumask_first(mask);

	rv.msrs	  = msrs;

	rv.msr_no = msr_no;



	preempt_disable();

	/*

	 * FIXME: handle the CPU we're executing on separately for now until

	 * smp_call_function_many has been fixed to not skip it.

	 */

	this_cpu = raw_smp_processor_id();

	smp_call_function_single(this_cpu, __rdmsr_on_cpu, &rv, 1);



	smp_call_function_many(mask, __rdmsr_on_cpu, &rv, 1);

	preempt_enable();

}

EXPORT_SYMBOL(rdmsr_on_cpus);



/*

 * wrmsr on a bunch of CPUs

 *

 * @mask:       which CPUs

 * @msr_no:     which MSR

 * @msrs:       array of MSR values

 *

 */

void wrmsr_on_cpus(const cpumask_t *mask, u32 msr_no, struct msr *msrs)

{

	struct msr_info rv;

	int this_cpu;



	memset(&rv, 0, sizeof(rv));



	rv.off    = cpumask_first(mask);

	rv.msrs   = msrs;

	rv.msr_no = msr_no;



	preempt_disable();

	/*

	 * FIXME: handle the CPU we're executing on separately for now until

	 * smp_call_function_many has been fixed to not skip it.

	 */

	this_cpu = raw_smp_processor_id();

	smp_call_function_single(this_cpu, __wrmsr_on_cpu, &rv, 1);



	smp_call_function_many(mask, __wrmsr_on_cpu, &rv, 1);

	preempt_enable();

}

EXPORT_SYMBOL(wrmsr_on_cpus);



/* These "safe" variants are slower and should be used when the target MSR

   may not actually exist. */
@@ -55,14 +140,14 @@ static void __rdmsr_safe_on_cpu(void *info) 
{

	struct msr_info *rv = info;



	rv->err = rdmsr_safe(rv->msr_no, &rv->l, &rv->h);

	rv->err = rdmsr_safe(rv->msr_no, &rv->reg.l, &rv->reg.h);

}



static void __wrmsr_safe_on_cpu(void *info)

{

	struct msr_info *rv = info;



	rv->err = wrmsr_safe(rv->msr_no, rv->l, rv->h);

	rv->err = wrmsr_safe(rv->msr_no, rv->reg.l, rv->reg.h);

}



int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
@@ -70,28 +155,29 @@ int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h) 
	int err;

	struct msr_info rv;



	memset(&rv, 0, sizeof(rv));



	rv.msr_no = msr_no;

	err = smp_call_function_single(cpu, __rdmsr_safe_on_cpu, &rv, 1);

	*l = rv.l;

	*h = rv.h;

	*l = rv.reg.l;

	*h = rv.reg.h;



	return err ? err : rv.err;

}

EXPORT_SYMBOL(rdmsr_safe_on_cpu);



int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)

{

	int err;

	struct msr_info rv;



	memset(&rv, 0, sizeof(rv));



	rv.msr_no = msr_no;

	rv.l = l;

	rv.h = h;

	rv.reg.l = l;

	rv.reg.h = h;

	err = smp_call_function_single(cpu, __wrmsr_safe_on_cpu, &rv, 1);



	return err ? err : rv.err;

}



EXPORT_SYMBOL(rdmsr_on_cpu);

EXPORT_SYMBOL(wrmsr_on_cpu);

EXPORT_SYMBOL(rdmsr_safe_on_cpu);

EXPORT_SYMBOL(wrmsr_safe_on_cpu);

drivers/edac/Kconfig

+25 −1
Original line number Diff line number Diff line
@@ -49,7 +49,6 @@ config EDAC_DEBUG_VERBOSE 


config EDAC_MM_EDAC

	tristate "Main Memory EDAC (Error Detection And Correction) reporting"

	default y

	help

	  Some systems are able to detect and correct errors in main

	  memory.  EDAC can report statistics on memory error
@@ -58,6 +57,31 @@ config EDAC_MM_EDAC 
	  occurred so that a particular failing memory module can be

	  replaced.  If unsure, select 'Y'.



config EDAC_AMD64

	tristate "AMD64 (Opteron, Athlon64) K8, F10h, F11h"

	depends on EDAC_MM_EDAC && K8_NB && X86_64 && PCI

	help

	  Support for error detection and correction on the AMD 64

	  Families of Memory Controllers (K8, F10h and F11h)



config EDAC_AMD64_ERROR_INJECTION

	bool "Sysfs Error Injection facilities"

	depends on EDAC_AMD64

	help

	  Recent Opterons (Family 10h and later) provide for Memory Error

	  Injection into the ECC detection circuits. The amd64_edac module

	  allows the operator/user to inject Uncorrectable and Correctable

	  errors into DRAM.



	  When enabled, in each of the respective memory controller directories

	  (/sys/devices/system/edac/mc/mcX), there are 3 input files:



	  - inject_section (0..3, 16-byte section of 64-byte cacheline),

	  - inject_word (0..8, 16-bit word of 16-byte section),

	  - inject_ecc_vector (hex ecc vector: select bits of inject word)



	  In addition, there are two control files, inject_read and inject_write,

	  which trigger the DRAM ECC Read and Write respectively.



config EDAC_AMD76X

	tristate "AMD 76x (760, 762, 768)"