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Commit c13eb931 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'mediatek-drm-next-2016-08-12' of git://git.pengutronix.de/git/pza/linux into drm-next 

mediatek-drm maintainers and gamma correction

- add MAINTAINERS entry for mediatek-drm driver
- add support for AAL and GAMMA engines
- hook up gamma correction LUT
- add support for temporal dithering to OD and GAMMA engines

* tag 'mediatek-drm-next-2016-08-12' of git://git.pengutronix.de/git/pza/linux:
  drm/mediatek: set mt8173 dithering function
  drm/mediatek: Add gamma correction.
  drm/mediatek: Add GAMMA engine basic function
  drm/mediatek: Add AAL engine basic function
  drm: mediatek: add Maintainers entry for Mediatek DRM drivers
parents db474322 72164364

MAINTAINERS

+8 −0
Original line number Diff line number Diff line
@@ -4064,6 +4064,14 @@ S: Orphan / Obsolete 
F:	drivers/gpu/drm/i810/

F:	include/uapi/drm/i810_drm.h



DRM DRIVERS FOR MEDIATEK

M:	CK Hu <ck.hu@mediatek.com>

M:	Philipp Zabel <p.zabel@pengutronix.de>

L:	dri-devel@lists.freedesktop.org

S:	Supported

F:	drivers/gpu/drm/mediatek/

F:	Documentation/devicetree/bindings/display/mediatek/



DRM DRIVER FOR MSM ADRENO GPU

M:	Rob Clark <robdclark@gmail.com>

L:	linux-arm-msm@vger.kernel.org

drivers/gpu/drm/mediatek/mtk_disp_ovl.c

+2 −1
Original line number Diff line number Diff line
@@ -103,7 +103,8 @@ static void mtk_ovl_stop(struct mtk_ddp_comp *comp) 
}



static void mtk_ovl_config(struct mtk_ddp_comp *comp, unsigned int w,

			   unsigned int h, unsigned int vrefresh)

			   unsigned int h, unsigned int vrefresh,

			   unsigned int bpc)

{

	if (w != 0 && h != 0)

		writel_relaxed(h << 16 | w, comp->regs + DISP_REG_OVL_ROI_SIZE);

drivers/gpu/drm/mediatek/mtk_disp_rdma.c

+2 −1
Original line number Diff line number Diff line
@@ -106,7 +106,8 @@ static void mtk_rdma_stop(struct mtk_ddp_comp *comp) 
}



static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width,

			    unsigned int height, unsigned int vrefresh)

			    unsigned int height, unsigned int vrefresh,

			    unsigned int bpc)

{

	unsigned int threshold;

	unsigned int reg;

drivers/gpu/drm/mediatek/mtk_drm_crtc.c

+24 −4
Original line number Diff line number Diff line
@@ -222,7 +222,9 @@ static void mtk_crtc_ddp_clk_disable(struct mtk_drm_crtc *mtk_crtc) 
static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc)

{

	struct drm_crtc *crtc = &mtk_crtc->base;

	unsigned int width, height, vrefresh;

	struct drm_connector *connector;

	struct drm_encoder *encoder;

	unsigned int width, height, vrefresh, bpc = MTK_MAX_BPC;

	int ret;

	int i;
@@ -234,6 +236,19 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc) 
	height = crtc->state->adjusted_mode.vdisplay;

	vrefresh = crtc->state->adjusted_mode.vrefresh;



	drm_for_each_encoder(encoder, crtc->dev) {

		if (encoder->crtc != crtc)

			continue;



		drm_for_each_connector(connector, crtc->dev) {

			if (connector->encoder != encoder)

				continue;

			if (connector->display_info.bpc != 0 &&

			    bpc > connector->display_info.bpc)

				bpc = connector->display_info.bpc;

		}

	}



	ret = pm_runtime_get_sync(crtc->dev->dev);

	if (ret < 0) {

		DRM_ERROR("Failed to enable power domain: %d\n", ret);
@@ -266,7 +281,7 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc) 
	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {

		struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[i];



		mtk_ddp_comp_config(comp, width, height, vrefresh);

		mtk_ddp_comp_config(comp, width, height, vrefresh, bpc);

		mtk_ddp_comp_start(comp);

	}
@@ -409,6 +424,9 @@ static void mtk_drm_crtc_atomic_flush(struct drm_crtc *crtc, 
	}

	if (pending_planes)

		mtk_crtc->pending_planes = true;

	if (crtc->state->color_mgmt_changed)

		for (i = 0; i < mtk_crtc->ddp_comp_nr; i++)

			mtk_ddp_gamma_set(mtk_crtc->ddp_comp[i], crtc->state);

}



static const struct drm_crtc_funcs mtk_crtc_funcs = {
@@ -418,6 +436,7 @@ static const struct drm_crtc_funcs mtk_crtc_funcs = { 
	.reset			= mtk_drm_crtc_reset,

	.atomic_duplicate_state	= mtk_drm_crtc_duplicate_state,

	.atomic_destroy_state	= mtk_drm_crtc_destroy_state,

	.gamma_set		= drm_atomic_helper_legacy_gamma_set,

};



static const struct drm_crtc_helper_funcs mtk_crtc_helper_funcs = {
@@ -464,7 +483,7 @@ void mtk_crtc_ddp_irq(struct drm_crtc *crtc, struct mtk_ddp_comp *ovl) 
	if (state->pending_config) {

		mtk_ddp_comp_config(ovl, state->pending_width,

				    state->pending_height,

				    state->pending_vrefresh);

				    state->pending_vrefresh, 0);



		state->pending_config = false;

	}
@@ -568,7 +587,8 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev, 
				&mtk_crtc->planes[1].base, pipe);

	if (ret < 0)

		goto unprepare;



	drm_mode_crtc_set_gamma_size(&mtk_crtc->base, MTK_LUT_SIZE);

	drm_crtc_enable_color_mgmt(&mtk_crtc->base, 0, false, MTK_LUT_SIZE);

	priv->crtc[pipe] = &mtk_crtc->base;

	priv->num_pipes++;

drivers/gpu/drm/mediatek/mtk_drm_crtc.h

+3 −0
Original line number Diff line number Diff line
@@ -19,6 +19,9 @@ 
#include "mtk_drm_plane.h"



#define OVL_LAYER_NR	4

#define MTK_LUT_SIZE	512

#define MTK_MAX_BPC	10

#define MTK_MIN_BPC	3



int mtk_drm_crtc_enable_vblank(struct drm_device *drm, unsigned int pipe);

void mtk_drm_crtc_disable_vblank(struct drm_device *drm, unsigned int pipe);