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Commit c0c4261b authored by Jesse Barnes's avatar Jesse Barnes Committed by Dave Airlie
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drm/i915: restore pipeconf regs unconditionally



On many chipsets, the checks for DPLL enable or VGA mode will prevent the pipeconf regs from being restored, which could result in a blank display or X failing to come back after resume.  So restore them unconditionally along with actually restoring pipe B's palette correctly.

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 0da3ea12
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+4 −7
Original line number Original line Diff line number Diff line
@@ -407,8 +407,6 @@ static int i915_resume(struct drm_device *dev)
		I915_WRITE(DSPATILEOFF, dev_priv->saveDSPATILEOFF);
		I915_WRITE(DSPATILEOFF, dev_priv->saveDSPATILEOFF);
	}
	}


	if ((dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) &&
	    (dev_priv->saveDPLL_A & DPLL_VGA_MODE_DIS))
	I915_WRITE(PIPEACONF, dev_priv->savePIPEACONF);
	I915_WRITE(PIPEACONF, dev_priv->savePIPEACONF);


	i915_restore_palette(dev, PIPE_A);
	i915_restore_palette(dev, PIPE_A);
@@ -451,10 +449,9 @@ static int i915_resume(struct drm_device *dev)
		I915_WRITE(DSPBTILEOFF, dev_priv->saveDSPBTILEOFF);
		I915_WRITE(DSPBTILEOFF, dev_priv->saveDSPBTILEOFF);
	}
	}


	if ((dev_priv->saveDPLL_B & DPLL_VCO_ENABLE) &&
	    (dev_priv->saveDPLL_B & DPLL_VGA_MODE_DIS))
	I915_WRITE(PIPEBCONF, dev_priv->savePIPEBCONF);
	I915_WRITE(PIPEBCONF, dev_priv->savePIPEBCONF);
	i915_restore_palette(dev, PIPE_A);

	i915_restore_palette(dev, PIPE_B);
	/* Enable the plane */
	/* Enable the plane */
	I915_WRITE(DSPBCNTR, dev_priv->saveDSPBCNTR);
	I915_WRITE(DSPBCNTR, dev_priv->saveDSPBCNTR);
	I915_WRITE(DSPBBASE, I915_READ(DSPBBASE));
	I915_WRITE(DSPBBASE, I915_READ(DSPBBASE));