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Commit bfde19c4 authored by Rafael J. Wysocki's avatar Rafael J. Wysocki
Browse files

Merge branches 'powercap' and 'acpi-lpss' with new device IDs 

* powercap:
  powercap / RAPL: add support for ValleyView Soc

* acpi-lpss:
  ACPI: Add BayTrail SoC GPIO and LPSS ACPI IDs
parents 1a672535 ed93b714 f6308b36

drivers/acpi/acpi_lpss.c

+1 −0
Original line number Diff line number Diff line
@@ -162,6 +162,7 @@ static const struct acpi_device_id acpi_lpss_device_ids[] = { 
	{ "80860F14", (unsigned long)&byt_sdio_dev_desc },

	{ "80860F41", (unsigned long)&byt_i2c_dev_desc },

	{ "INT33B2", },

	{ "INT33FC", },



	{ "INT3430", (unsigned long)&lpt_dev_desc },

	{ "INT3431", (unsigned long)&lpt_dev_desc },

drivers/pinctrl/pinctrl-baytrail.c

+1 −0
Original line number Diff line number Diff line
@@ -512,6 +512,7 @@ static const struct dev_pm_ops byt_gpio_pm_ops = { 


static const struct acpi_device_id byt_gpio_acpi_match[] = {

	{ "INT33B2", 0 },

	{ "INT33FC", 0 },

	{ }

};

MODULE_DEVICE_TABLE(acpi, byt_gpio_acpi_match);

drivers/powercap/intel_rapl.c

+11 −2
Original line number Diff line number Diff line
@@ -833,6 +833,11 @@ static int rapl_write_data_raw(struct rapl_domain *rd, 
	return 0;

}



static const struct x86_cpu_id energy_unit_quirk_ids[] = {

	{ X86_VENDOR_INTEL, 6, 0x37},/* VLV */

	{}

};



static int rapl_check_unit(struct rapl_package *rp, int cpu)

{

	u64 msr_val;
@@ -853,9 +858,12 @@ static int rapl_check_unit(struct rapl_package *rp, int cpu) 
	 * time unit: 1/time_unit_divisor Seconds

	 */

	value = (msr_val & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET;

	/* some CPUs have different way to calculate energy unit */

	if (x86_match_cpu(energy_unit_quirk_ids))

		rp->energy_unit_divisor = 1000000 / (1 << value);

	else

		rp->energy_unit_divisor = 1 << value;





	value = (msr_val & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET;

	rp->power_unit_divisor = 1 << value;
@@ -941,6 +949,7 @@ static void package_power_limit_irq_restore(int package_id) 
static const struct x86_cpu_id rapl_ids[] = {

	{ X86_VENDOR_INTEL, 6, 0x2a},/* SNB */

	{ X86_VENDOR_INTEL, 6, 0x2d},/* SNB EP */

	{ X86_VENDOR_INTEL, 6, 0x37},/* VLV */

	{ X86_VENDOR_INTEL, 6, 0x3a},/* IVB */

	{ X86_VENDOR_INTEL, 6, 0x45},/* HSW */

	/* TODO: Add more CPU IDs after testing */