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Commit be782df5 authored by Paul Mundt's avatar Paul Mundt Committed by Paul Mundt
Browse files

sh: NR_IRQS consolidation. 



Each board sets the total number of IRQs that it's interested in via
the machvec. Previously we cared about the off vs on-chip IRQ range,
but any code relying on that is long dead. Set NR_IRQS to something
sensible given the vector range, and allow boards to cap it if they
really care.

Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent fa691511

arch/sh/kernel/irq.c

+3 −2
Original line number Original line Diff line number Diff line
@@ -13,6 +13,7 @@ 
#include <linux/seq_file.h>

#include <linux/seq_file.h>

#include <linux/irq.h>

#include <linux/irq.h>

#include <asm/processor.h>

#include <asm/processor.h>

#include <asm/machvec.h>

#include <asm/uaccess.h>

#include <asm/uaccess.h>

#include <asm/thread_info.h>

#include <asm/thread_info.h>

#include <asm/cpu/mmu_context.h>

#include <asm/cpu/mmu_context.h>
@@ -44,7 +45,7 @@ int show_interrupts(struct seq_file *p, void *v) 
		seq_putc(p, '\n');

		seq_putc(p, '\n');

	}

	}





	if (i < NR_IRQS) {

	if (i < sh_mv.mv_nr_irqs) {

		spin_lock_irqsave(&irq_desc[i].lock, flags);

		spin_lock_irqsave(&irq_desc[i].lock, flags);

		action = irq_desc[i].action;

		action = irq_desc[i].action;

		if (!action)

		if (!action)
@@ -61,7 +62,7 @@ int show_interrupts(struct seq_file *p, void *v) 
		seq_putc(p, '\n');

		seq_putc(p, '\n');

unlock:

unlock:

		spin_unlock_irqrestore(&irq_desc[i].lock, flags);

		spin_unlock_irqrestore(&irq_desc[i].lock, flags);

	} else if (i == NR_IRQS)

	} else if (i == sh_mv.mv_nr_irqs)

		seq_printf(p, "Err: %10u\n", atomic_read(&irq_err_count));

		seq_printf(p, "Err: %10u\n", atomic_read(&irq_err_count));





	return 0;

	return 0;

include/asm-sh/irq.h

+5 −86
Original line number Original line Diff line number Diff line
@@ -2,94 +2,13 @@ 
#define __ASM_SH_IRQ_H

#define __ASM_SH_IRQ_H





#include <asm/machvec.h>

#include <asm/machvec.h>

#include <asm/ptrace.h>		/* for pt_regs */





/* NR_IRQS is made from three components:

/*

 *   1. ONCHIP_NR_IRQS - number of IRLS + on-chip peripherial modules

 * A sane default based on a reasonable vector table size, platforms are

 *   2. PINT_NR_IRQS   - number of PINT interrupts

 * advised to cap this at the hard limit that they're interested in

 *   3. OFFCHIP_NR_IRQS - numbe of IRQs from off-chip peripherial modules

 * through the machvec.

 */

 */



#define NR_IRQS 256

/* 1. ONCHIP_NR_IRQS */

#if defined(CONFIG_CPU_SUBTYPE_SH7604)

# define ONCHIP_NR_IRQS 24	// Actually 21

#elif defined(CONFIG_CPU_SUBTYPE_SH7707)

# define ONCHIP_NR_IRQS 64

# define PINT_NR_IRQS   16

#elif defined(CONFIG_CPU_SUBTYPE_SH7708)

# define ONCHIP_NR_IRQS 32

#elif defined(CONFIG_CPU_SUBTYPE_SH7709) || \

      defined(CONFIG_CPU_SUBTYPE_SH7706) || \

      defined(CONFIG_CPU_SUBTYPE_SH7705)

# define ONCHIP_NR_IRQS 64	// Actually 61

# define PINT_NR_IRQS   16

#elif defined(CONFIG_CPU_SUBTYPE_SH7710)

# define ONCHIP_NR_IRQS 104

#elif defined(CONFIG_CPU_SUBTYPE_SH7750)

# define ONCHIP_NR_IRQS 48	// Actually 44

#elif defined(CONFIG_CPU_SUBTYPE_SH7751)

# define ONCHIP_NR_IRQS 72

#elif defined(CONFIG_CPU_SUBTYPE_SH7760)

# define ONCHIP_NR_IRQS 112	/* XXX */

#elif defined(CONFIG_CPU_SUBTYPE_SH4_202)

# define ONCHIP_NR_IRQS 72

#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1)

# define ONCHIP_NR_IRQS 144

#elif defined(CONFIG_CPU_SUBTYPE_SH7300) || \

      defined(CONFIG_CPU_SUBTYPE_SH73180) || \

      defined(CONFIG_CPU_SUBTYPE_SH7343) || \

      defined(CONFIG_CPU_SUBTYPE_SH7722)

# define ONCHIP_NR_IRQS 109

#elif defined(CONFIG_CPU_SUBTYPE_SH7780)

# define ONCHIP_NR_IRQS 111

#elif defined(CONFIG_CPU_SUBTYPE_SH7206)

# define ONCHIP_NR_IRQS 256

#elif defined(CONFIG_CPU_SUBTYPE_SH7619)

# define ONCHIP_NR_IRQS 128

#elif defined(CONFIG_SH_UNKNOWN)	/* Most be last */

# define ONCHIP_NR_IRQS 144

#endif



/* 2. PINT_NR_IRQS */

#ifdef CONFIG_SH_UNKNOWN

# define PINT_NR_IRQS 16

#else

# ifndef PINT_NR_IRQS

#  define PINT_NR_IRQS 0

# endif

#endif



#if PINT_NR_IRQS > 0

# define PINT_IRQ_BASE  ONCHIP_NR_IRQS

#endif



/* 3. OFFCHIP_NR_IRQS */

#if defined(CONFIG_HD64461)

# define OFFCHIP_NR_IRQS 18

#elif defined(CONFIG_HD64465)

# define OFFCHIP_NR_IRQS 16

#elif defined (CONFIG_SH_DREAMCAST)

# define OFFCHIP_NR_IRQS 96

#elif defined (CONFIG_SH_TITAN)

# define OFFCHIP_NR_IRQS 4

#elif defined(CONFIG_SH_R7780RP)

# define OFFCHIP_NR_IRQS 16

#elif defined(CONFIG_SH_7343_SOLUTION_ENGINE)

# define OFFCHIP_NR_IRQS 12

#elif defined(CONFIG_SH_7722_SOLUTION_ENGINE)

# define OFFCHIP_NR_IRQS 14

#elif defined(CONFIG_SH_UNKNOWN)

# define OFFCHIP_NR_IRQS 16	/* Must also be last */

#else

# define OFFCHIP_NR_IRQS 0

#endif



#if OFFCHIP_NR_IRQS > 0

# define OFFCHIP_IRQ_BASE (ONCHIP_NR_IRQS + PINT_NR_IRQS)

#endif



/* NR_IRQS. 1+2+3 */

#define NR_IRQS (ONCHIP_NR_IRQS + PINT_NR_IRQS + OFFCHIP_NR_IRQS)





/*

/*

 * Convert back and forth between INTEVT and IRQ values.

 * Convert back and forth between INTEVT and IRQ values.