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Commit be0dd4dd authored by Ilia Mirkin's avatar Ilia Mirkin Committed by Ben Skeggs
Browse files

drm/nv31/mpeg: split the nv31 and nv40 dma setting implementations 



NV31 has different config bits than NV40+ do. Also fix the DMA_IMAGE
VRAM-only setting to check the right bits.

Signed-off-by: default avatarIlia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent e6585cab

drivers/gpu/drm/nouveau/core/engine/mpeg/nv31.c

+4 −4
Original line number Diff line number Diff line
@@ -80,18 +80,18 @@ nv31_mpeg_mthd_dma(struct nouveau_object *object, u32 mthd, void *arg, u32 len) 


	if (mthd == 0x0190) {

		/* DMA_CMD */

		nv_mask(priv, 0x00b300, 0x00030000, (dma0 & 0x00030000));

		nv_mask(priv, 0x00b300, 0x00010000, (dma0 & 0x00030000) ? 0x00010000 : 0);

		nv_wr32(priv, 0x00b334, base);

		nv_wr32(priv, 0x00b324, size);

	} else

	if (mthd == 0x01a0) {

		/* DMA_DATA */

		nv_mask(priv, 0x00b300, 0x000c0000, (dma0 & 0x00030000) << 2);

		nv_mask(priv, 0x00b300, 0x00020000, (dma0 & 0x00030000) ? 0x00020000 : 0);

		nv_wr32(priv, 0x00b360, base);

		nv_wr32(priv, 0x00b364, size);

	} else {

		/* DMA_IMAGE, VRAM only */

		if (dma0 & 0x000c0000)

		if (dma0 & 0x00030000)

			return -EINVAL;



		nv_wr32(priv, 0x00b370, base);
@@ -101,7 +101,7 @@ nv31_mpeg_mthd_dma(struct nouveau_object *object, u32 mthd, void *arg, u32 len) 
	return 0;

}



static struct nouveau_ofuncs

struct nouveau_ofuncs

nv31_mpeg_ofuncs = {

	.ctor = nv31_mpeg_object_ctor,

	.dtor = _nouveau_gpuobj_dtor,

drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c

+58 −1
Original line number Diff line number Diff line
@@ -33,6 +33,63 @@ 
#include <engine/mpeg.h>

#include <engine/mpeg/nv31.h>



/*******************************************************************************

 * MPEG object classes

 ******************************************************************************/



static int

nv40_mpeg_mthd_dma(struct nouveau_object *object, u32 mthd, void *arg, u32 len)

{

	struct nouveau_instmem *imem = nouveau_instmem(object);

	struct nv31_mpeg_priv *priv = (void *)object->engine;

	u32 inst = *(u32 *)arg << 4;

	u32 dma0 = nv_ro32(imem, inst + 0);

	u32 dma1 = nv_ro32(imem, inst + 4);

	u32 dma2 = nv_ro32(imem, inst + 8);

	u32 base = (dma2 & 0xfffff000) | (dma0 >> 20);

	u32 size = dma1 + 1;



	/* only allow linear DMA objects */

	if (!(dma0 & 0x00002000))

		return -EINVAL;



	if (mthd == 0x0190) {

		/* DMA_CMD */

		nv_mask(priv, 0x00b300, 0x00030000, (dma0 & 0x00030000));

		nv_wr32(priv, 0x00b334, base);

		nv_wr32(priv, 0x00b324, size);

	} else

	if (mthd == 0x01a0) {

		/* DMA_DATA */

		nv_mask(priv, 0x00b300, 0x000c0000, (dma0 & 0x00030000) << 2);

		nv_wr32(priv, 0x00b360, base);

		nv_wr32(priv, 0x00b364, size);

	} else {

		/* DMA_IMAGE, VRAM only */

		if (dma0 & 0x00030000)

			return -EINVAL;



		nv_wr32(priv, 0x00b370, base);

		nv_wr32(priv, 0x00b374, size);

	}



	return 0;

}



static struct nouveau_omthds

nv40_mpeg_omthds[] = {

	{ 0x0190, 0x0190, nv40_mpeg_mthd_dma },

	{ 0x01a0, 0x01a0, nv40_mpeg_mthd_dma },

	{ 0x01b0, 0x01b0, nv40_mpeg_mthd_dma },

	{}

};



struct nouveau_oclass

nv40_mpeg_sclass[] = {

	{ 0x3174, &nv31_mpeg_ofuncs, nv40_mpeg_omthds },

	{}

};



/*******************************************************************************

 * PMPEG engine/subdev functions

 ******************************************************************************/
@@ -68,7 +125,7 @@ nv40_mpeg_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
	nv_subdev(priv)->unit = 0x00000002;

	nv_subdev(priv)->intr = nv40_mpeg_intr;

	nv_engine(priv)->cclass = &nv31_mpeg_cclass;

	nv_engine(priv)->sclass = nv31_mpeg_sclass;

	nv_engine(priv)->sclass = nv40_mpeg_sclass;

	nv_engine(priv)->tile_prog = nv31_mpeg_tile_prog;

	return 0;

}

drivers/gpu/drm/nouveau/core/engine/mpeg/nv44.c

+1 −1
Original line number Diff line number Diff line
@@ -177,7 +177,7 @@ nv44_mpeg_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
	nv_subdev(priv)->unit = 0x00000002;

	nv_subdev(priv)->intr = nv44_mpeg_me_intr;

	nv_engine(priv)->cclass = &nv44_mpeg_cclass;

	nv_engine(priv)->sclass = nv31_mpeg_sclass;

	nv_engine(priv)->sclass = nv40_mpeg_sclass;

	nv_engine(priv)->tile_prog = nv31_mpeg_tile_prog;

	return 0;

}

drivers/gpu/drm/nouveau/core/include/engine/mpeg.h

+2 −0
Original line number Diff line number Diff line
@@ -45,8 +45,10 @@ extern struct nouveau_oclass nv40_mpeg_oclass; 
extern struct nouveau_oclass nv44_mpeg_oclass;

extern struct nouveau_oclass nv50_mpeg_oclass;

extern struct nouveau_oclass nv84_mpeg_oclass;

extern struct nouveau_ofuncs nv31_mpeg_ofuncs;

extern struct nouveau_oclass nv31_mpeg_cclass;

extern struct nouveau_oclass nv31_mpeg_sclass[];

extern struct nouveau_oclass nv40_mpeg_sclass[];

void nv31_mpeg_intr(struct nouveau_subdev *);

void nv31_mpeg_tile_prog(struct nouveau_engine *, int);

int  nv31_mpeg_init(struct nouveau_object *);