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Commit bdc08942 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6 

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6: (37 commits)
  [NETFILTER]: fix ebtable targets return
  [IP_TUNNEL]: Don't limit the number of tunnels with generic name explicitly.
  [NET]: Restore sanity wrt. print_mac().
  [NEIGH]: Fix race between neighbor lookup and table's hash_rnd update.
  [RTNL]: Validate hardware and broadcast address attribute for RTM_NEWLINK
  tg3: ethtool phys_id default
  [BNX2]: Update version to 1.7.4.
  [BNX2]: Disable parallel detect on an HP blade.
  [BNX2]: More 5706S link down workaround.
  ssb: Fix support for PCI devices behind a SSB->PCI bridge
  zd1211rw: fix sparse warnings
  rtl818x: fix sparse warnings
  ssb: Fix pcicore cardbus mode
  ssb: Make the GPIO API reentrancy safe
  ssb: Fix the GPIO API
  ssb: Fix watchdog access for devices without a chipcommon
  ssb: Fix serial console on new bcm47xx devices
  ath5k: Fix build warnings on some 64-bit platforms.
  WDEV, ath5k, don't return int from bool function
  WDEV: ath5k, fix lock imbalance
  ...
parents 85b80ebf 1b04ab45

drivers/net/bnx2.c

+32 −18
Original line number Original line Diff line number Diff line
@@ -56,8 +56,8 @@ 




#define DRV_MODULE_NAME		"bnx2"

#define DRV_MODULE_NAME		"bnx2"

#define PFX DRV_MODULE_NAME	": "

#define PFX DRV_MODULE_NAME	": "

#define DRV_MODULE_VERSION	"1.7.3"

#define DRV_MODULE_VERSION	"1.7.4"

#define DRV_MODULE_RELDATE	"January 29, 2008"

#define DRV_MODULE_RELDATE	"February 18, 2008"





#define RUN_AT(x) (jiffies + (x))

#define RUN_AT(x) (jiffies + (x))
@@ -1273,14 +1273,20 @@ bnx2_set_link(struct bnx2 *bp) 




	if ((bp->phy_flags & BNX2_PHY_FLAG_SERDES) &&

	if ((bp->phy_flags & BNX2_PHY_FLAG_SERDES) &&

	    (CHIP_NUM(bp) == CHIP_NUM_5706)) {

	    (CHIP_NUM(bp) == CHIP_NUM_5706)) {

		u32 val;

		u32 val, an_dbg;





		if (bp->phy_flags & BNX2_PHY_FLAG_FORCED_DOWN) {

		if (bp->phy_flags & BNX2_PHY_FLAG_FORCED_DOWN) {

			bnx2_5706s_force_link_dn(bp, 0);

			bnx2_5706s_force_link_dn(bp, 0);

			bp->phy_flags &= ~BNX2_PHY_FLAG_FORCED_DOWN;

			bp->phy_flags &= ~BNX2_PHY_FLAG_FORCED_DOWN;

		}

		}

		val = REG_RD(bp, BNX2_EMAC_STATUS);

		val = REG_RD(bp, BNX2_EMAC_STATUS);

		if (val & BNX2_EMAC_STATUS_LINK)



		bnx2_write_phy(bp, MII_BNX2_MISC_SHADOW, MISC_SHDW_AN_DBG);

		bnx2_read_phy(bp, MII_BNX2_MISC_SHADOW, &an_dbg);

		bnx2_read_phy(bp, MII_BNX2_MISC_SHADOW, &an_dbg);



		if ((val & BNX2_EMAC_STATUS_LINK) &&

		    !(an_dbg & MISC_SHDW_AN_DBG_NOSYNC))

			bmsr |= BMSR_LSTATUS;

			bmsr |= BMSR_LSTATUS;

		else

		else

			bmsr &= ~BMSR_LSTATUS;

			bmsr &= ~BMSR_LSTATUS;
@@ -5356,11 +5362,15 @@ bnx2_test_intr(struct bnx2 *bp) 
	return -ENODEV;

	return -ENODEV;

}

}





/* Determining link for parallel detection. */

static int

static int

bnx2_5706_serdes_has_link(struct bnx2 *bp)

bnx2_5706_serdes_has_link(struct bnx2 *bp)

{

{

	u32 mode_ctl, an_dbg, exp;

	u32 mode_ctl, an_dbg, exp;





	if (bp->phy_flags & BNX2_PHY_FLAG_NO_PARALLEL)

		return 0;



	bnx2_write_phy(bp, MII_BNX2_MISC_SHADOW, MISC_SHDW_MODE_CTL);

	bnx2_write_phy(bp, MII_BNX2_MISC_SHADOW, MISC_SHDW_MODE_CTL);

	bnx2_read_phy(bp, MII_BNX2_MISC_SHADOW, &mode_ctl);

	bnx2_read_phy(bp, MII_BNX2_MISC_SHADOW, &mode_ctl);
@@ -5390,13 +5400,6 @@ bnx2_5706_serdes_timer(struct bnx2 *bp) 
	int check_link = 1;

	int check_link = 1;





	spin_lock(&bp->phy_lock);

	spin_lock(&bp->phy_lock);

	if (bp->phy_flags & BNX2_PHY_FLAG_FORCED_DOWN) {

		bnx2_5706s_force_link_dn(bp, 0);

		bp->phy_flags &= ~BNX2_PHY_FLAG_FORCED_DOWN;

		spin_unlock(&bp->phy_lock);

		return;

	}



	if (bp->serdes_an_pending) {

	if (bp->serdes_an_pending) {

		bp->serdes_an_pending--;

		bp->serdes_an_pending--;

		check_link = 0;

		check_link = 0;
@@ -5420,7 +5423,6 @@ bnx2_5706_serdes_timer(struct bnx2 *bp) 
		 (bp->phy_flags & BNX2_PHY_FLAG_PARALLEL_DETECT)) {

		 (bp->phy_flags & BNX2_PHY_FLAG_PARALLEL_DETECT)) {

		u32 phy2;

		u32 phy2;





		check_link = 0;

		bnx2_write_phy(bp, 0x17, 0x0f01);

		bnx2_write_phy(bp, 0x17, 0x0f01);

		bnx2_read_phy(bp, 0x15, &phy2);

		bnx2_read_phy(bp, 0x15, &phy2);

		if (phy2 & 0x20) {

		if (phy2 & 0x20) {
@@ -5435,17 +5437,21 @@ bnx2_5706_serdes_timer(struct bnx2 *bp) 
	} else

	} else

		bp->current_interval = bp->timer_interval;

		bp->current_interval = bp->timer_interval;





	if (bp->link_up && (bp->autoneg & AUTONEG_SPEED) && check_link) {

	if (check_link) {

		u32 val;

		u32 val;





		bnx2_write_phy(bp, MII_BNX2_MISC_SHADOW, MISC_SHDW_AN_DBG);

		bnx2_write_phy(bp, MII_BNX2_MISC_SHADOW, MISC_SHDW_AN_DBG);

		bnx2_read_phy(bp, MII_BNX2_MISC_SHADOW, &val);

		bnx2_read_phy(bp, MII_BNX2_MISC_SHADOW, &val);

		bnx2_read_phy(bp, MII_BNX2_MISC_SHADOW, &val);

		bnx2_read_phy(bp, MII_BNX2_MISC_SHADOW, &val);





		if (val & MISC_SHDW_AN_DBG_NOSYNC) {

		if (bp->link_up && (val & MISC_SHDW_AN_DBG_NOSYNC)) {

			if (!(bp->phy_flags & BNX2_PHY_FLAG_FORCED_DOWN)) {

				bnx2_5706s_force_link_dn(bp, 1);

				bnx2_5706s_force_link_dn(bp, 1);

				bp->phy_flags |= BNX2_PHY_FLAG_FORCED_DOWN;

				bp->phy_flags |= BNX2_PHY_FLAG_FORCED_DOWN;

		}

			} else

				bnx2_set_link(bp);

		} else if (!bp->link_up && !(val & MISC_SHDW_AN_DBG_NOSYNC))

			bnx2_set_link(bp);

	}

	}

	spin_unlock(&bp->phy_lock);

	spin_unlock(&bp->phy_lock);

}

}
@@ -7326,7 +7332,15 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev) 
			bp->flags |= BNX2_FLAG_NO_WOL;

			bp->flags |= BNX2_FLAG_NO_WOL;

			bp->wol = 0;

			bp->wol = 0;

		}

		}

		if (CHIP_NUM(bp) != CHIP_NUM_5706) {

		if (CHIP_NUM(bp) == CHIP_NUM_5706) {

			/* Don't do parallel detect on this board because of

			 * some board problems.  The link will not go down

			 * if we do parallel detect.

			 */

			if (pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&

			    pdev->subsystem_device == 0x310c)

				bp->phy_flags |= BNX2_PHY_FLAG_NO_PARALLEL;

		} else {

			bp->phy_addr = 2;

			bp->phy_addr = 2;

			if (reg & BNX2_SHARED_HW_CFG_PHY_2_5G)

			if (reg & BNX2_SHARED_HW_CFG_PHY_2_5G)

				bp->phy_flags |= BNX2_PHY_FLAG_2_5G_CAPABLE;

				bp->phy_flags |= BNX2_PHY_FLAG_2_5G_CAPABLE;

drivers/net/bnx2.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -6673,6 +6673,7 @@ struct bnx2 { 
#define BNX2_PHY_FLAG_DIS_EARLY_DAC		0x00000400

#define BNX2_PHY_FLAG_DIS_EARLY_DAC		0x00000400

#define BNX2_PHY_FLAG_REMOTE_PHY_CAP		0x00000800

#define BNX2_PHY_FLAG_REMOTE_PHY_CAP		0x00000800

#define BNX2_PHY_FLAG_FORCED_DOWN		0x00001000

#define BNX2_PHY_FLAG_FORCED_DOWN		0x00001000

#define BNX2_PHY_FLAG_NO_PARALLEL		0x00002000





	u32			mii_bmcr;

	u32			mii_bmcr;

	u32			mii_bmsr;

	u32			mii_bmsr;

drivers/net/niu.c

+5 −4
Original line number Original line Diff line number Diff line
@@ -1616,12 +1616,13 @@ static int niu_enable_alt_mac(struct niu *np, int index, int on) 
	if (index >= niu_num_alt_addr(np))

	if (index >= niu_num_alt_addr(np))

		return -EINVAL;

		return -EINVAL;





	if (np->flags & NIU_FLAGS_XMAC)

	if (np->flags & NIU_FLAGS_XMAC) {

		reg = XMAC_ADDR_CMPEN;

		reg = XMAC_ADDR_CMPEN;

	else

		reg = BMAC_ADDR_CMPEN;



		mask = 1 << index;

		mask = 1 << index;

	} else {

		reg = BMAC_ADDR_CMPEN;

		mask = 1 << (index + 1);

	}





	val = nr64_mac(reg);

	val = nr64_mac(reg);

	if (on)

	if (on)

drivers/net/niu.h

+1 −1
Original line number Original line Diff line number Diff line
@@ -499,7 +499,7 @@ 
#define BMAC_ADDR2			0x00110UL

#define BMAC_ADDR2			0x00110UL

#define  BMAC_ADDR2_ADDR2		0x000000000000ffffULL

#define  BMAC_ADDR2_ADDR2		0x000000000000ffffULL





#define BMAC_NUM_ALT_ADDR		7

#define BMAC_NUM_ALT_ADDR		6





#define BMAC_ALT_ADDR0(NUM)		(0x00118UL + (NUM)*0x18UL)

#define BMAC_ALT_ADDR0(NUM)		(0x00118UL + (NUM)*0x18UL)

#define  BMAC_ALT_ADDR0_ADDR0		0x000000000000ffffULL

#define  BMAC_ALT_ADDR0_ADDR0		0x000000000000ffffULL

drivers/net/tg3.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -8781,7 +8781,7 @@ static int tg3_phys_id(struct net_device *dev, u32 data) 
		return -EAGAIN;

		return -EAGAIN;





	if (data == 0)

	if (data == 0)

		data = 2;

		data = UINT_MAX / 2;





	for (i = 0; i < (data * 2); i++) {

	for (i = 0; i < (data * 2); i++) {

		if ((i % 2) == 0)

		if ((i % 2) == 0)