Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit bdaaaec3 authored by Catalin Marinas's avatar Catalin Marinas
Browse files

nommu: Do not set PRRR and NMRR in proc-v7.S if !MMU 



ARMv7-R profile CPUs do not have these registers.

Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 8bdca0ac

arch/arm/mm/proc-v7.S

+1 −1
Original line number Diff line number Diff line
@@ -234,7 +234,6 @@ __v7_setup: 
	mcr	p15, 0, r4, c2, c0, 1		@ load TTB1

	mov	r10, #0x1f			@ domains 0, 1 = manager

	mcr	p15, 0, r10, c3, c0, 0		@ load domain access register

#endif

	/*

	 * Memory region attributes with SCTLR.TRE=1

	 *
@@ -267,6 +266,7 @@ __v7_setup: 
	ldr	r6, =0x40e040e0			@ NMRR

	mcr	p15, 0, r5, c10, c2, 0		@ write PRRR

	mcr	p15, 0, r6, c10, c2, 1		@ write NMRR

#endif

	adr	r5, v7_crval

	ldmia	r5, {r5, r6}

#ifdef CONFIG_CPU_ENDIAN_BE8