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Commit bd22dc17 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux 

Pull drm updates from Dave Airlie:
 "One of the smaller drm -next pulls in ages!

  Ben (nouveau) has a rewrite in progress but we decided to leave it
  stew for another cycle, so just some fixes from him.

   - radeon: lots of documentation work, fixes, more ring and locking
     changes, pcie gen2, more dp fixes.
   - i915: haswell features, gpu reset fixes, /dev/agpgart removal on
     machines that we never used it on, more VGA/HDP fix., more DP fixes
   - drm core: cleanups from Daniel, sis 64-bit fixes, range allocator
     colouring.

  but yeah fairly quiet merge this time, probably because I missed half
  of it!"

Trivial add-add conflict in include/linux/pci_regs.h

* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (255 commits)
  drm/nouveau: init vblank requests list
  drm/nv50: extend vblank semaphore to generic dmaobj + offset pair
  drm/nouveau: mark most of our ioctls as deprecated, move to compat layer
  drm/nouveau: move current gpuobj code out of nouveau_object.c
  drm/nouveau/gem: fix object reference leak in a failure path
  drm/nv50: rename INVALID_QUERY_OR_TEXTURE error to INVALID_OPERATION
  drm/nv84: decode PCRYPT errors
  drm/nouveau: dcb table quirk for fdo#50830
  nouveau: Fix alignment requirements on src and dst addresses
  drm/i915: unbreak lastclose for failed driver init
  drm/i915: Set the context before setting up regs for the context.
  drm/i915: constify mode in crtc_mode_fixup
  drm/i915/lvds: ditch ->prepare special case
  drm/i915: dereferencing an error pointer
  drm/i915: fix invalid reference handling of the default ctx obj
  drm/i915: Add -EIO to the list of known errors for __wait_seqno
  drm/i915: Flush the context object from the CPU caches upon switching
  drm/radeon: fix dpms on/off on trinity/aruba v2
  drm/radeon: on hotplug force link training to happen (v2)
  drm/radeon: fix hotplug of DP to DVI|HDMI passive adapters (v2)
  ...
parents 548ed102 98c7b423

drivers/char/agp/intel-agp.c

+3 −13
Original line number Original line Diff line number Diff line
@@ -12,6 +12,7 @@ 
#include <asm/smp.h>

#include <asm/smp.h>

#include "agp.h"

#include "agp.h"

#include "intel-agp.h"

#include "intel-agp.h"

#include <drm/intel-gtt.h>





int intel_agp_enabled;

int intel_agp_enabled;

EXPORT_SYMBOL(intel_agp_enabled);

EXPORT_SYMBOL(intel_agp_enabled);
@@ -747,7 +748,7 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev, 




	bridge->capndx = cap_ptr;

	bridge->capndx = cap_ptr;





	if (intel_gmch_probe(pdev, bridge))

	if (intel_gmch_probe(pdev, NULL, bridge))

		goto found_gmch;

		goto found_gmch;





	for (i = 0; intel_agp_chipsets[i].name != NULL; i++) {

	for (i = 0; intel_agp_chipsets[i].name != NULL; i++) {
@@ -824,7 +825,7 @@ static void __devexit agp_intel_remove(struct pci_dev *pdev) 




	agp_remove_bridge(bridge);

	agp_remove_bridge(bridge);





	intel_gmch_remove(pdev);

	intel_gmch_remove();





	agp_put_bridge(bridge);

	agp_put_bridge(bridge);

}

}
@@ -902,17 +903,6 @@ static struct pci_device_id agp_intel_pci_table[] = { 
	ID(PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB),

	ID(PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB),

	ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB),

	ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB),

	ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB),

	ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB),

	ID(PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB),

	ID(PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB),

	ID(PCI_DEVICE_ID_INTEL_SANDYBRIDGE_S_HB),

	ID(PCI_DEVICE_ID_INTEL_IVYBRIDGE_HB),

	ID(PCI_DEVICE_ID_INTEL_IVYBRIDGE_M_HB),

	ID(PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_HB),

	ID(PCI_DEVICE_ID_INTEL_VALLEYVIEW_HB),

	ID(PCI_DEVICE_ID_INTEL_HASWELL_HB),

	ID(PCI_DEVICE_ID_INTEL_HASWELL_M_HB),

	ID(PCI_DEVICE_ID_INTEL_HASWELL_S_HB),

	ID(PCI_DEVICE_ID_INTEL_HASWELL_E_HB),

	{ }

	{ }

};

};

drivers/char/agp/intel-agp.h

+0 −3
Original line number Original line Diff line number Diff line
@@ -251,7 +251,4 @@ 
#define PCI_DEVICE_ID_INTEL_HASWELL_SDV		0x0c16 /* SDV */

#define PCI_DEVICE_ID_INTEL_HASWELL_SDV		0x0c16 /* SDV */

#define PCI_DEVICE_ID_INTEL_HASWELL_E_HB			0x0c04

#define PCI_DEVICE_ID_INTEL_HASWELL_E_HB			0x0c04





int intel_gmch_probe(struct pci_dev *pdev,

			       struct agp_bridge_data *bridge);

void intel_gmch_remove(struct pci_dev *pdev);

#endif
 
#endif

drivers/char/agp/intel-gtt.c

+63 −28
Original line number Original line Diff line number Diff line
@@ -66,7 +66,6 @@ static struct _intel_private { 
	struct pci_dev *bridge_dev;

	struct pci_dev *bridge_dev;

	u8 __iomem *registers;

	u8 __iomem *registers;

	phys_addr_t gtt_bus_addr;

	phys_addr_t gtt_bus_addr;

	phys_addr_t gma_bus_addr;

	u32 PGETBL_save;

	u32 PGETBL_save;

	u32 __iomem *gtt;		/* I915G */

	u32 __iomem *gtt;		/* I915G */

	bool clear_fake_agp; /* on first access via agp, fill with scratch */

	bool clear_fake_agp; /* on first access via agp, fill with scratch */
@@ -76,6 +75,7 @@ static struct _intel_private { 
	struct resource ifp_resource;

	struct resource ifp_resource;

	int resource_valid;

	int resource_valid;

	struct page *scratch_page;

	struct page *scratch_page;

	int refcount;

} intel_private;

} intel_private;





#define INTEL_GTT_GEN	intel_private.driver->gen

#define INTEL_GTT_GEN	intel_private.driver->gen
@@ -648,6 +648,7 @@ static void intel_gtt_cleanup(void) 




static int intel_gtt_init(void)

static int intel_gtt_init(void)

{

{

	u32 gma_addr;

	u32 gtt_map_size;

	u32 gtt_map_size;

	int ret;

	int ret;
@@ -694,6 +695,15 @@ static int intel_gtt_init(void) 
		return ret;

		return ret;

	}

	}





	if (INTEL_GTT_GEN <= 2)

		pci_read_config_dword(intel_private.pcidev, I810_GMADDR,

				      &gma_addr);

	else

		pci_read_config_dword(intel_private.pcidev, I915_GMADDR,

				      &gma_addr);



	intel_private.base.gma_bus_addr = (gma_addr & PCI_BASE_ADDRESS_MEM_MASK);



	return 0;

	return 0;

}

}
@@ -767,20 +777,10 @@ static void i830_write_entry(dma_addr_t addr, unsigned int entry, 
	writel(addr | pte_flags, intel_private.gtt + entry);

	writel(addr | pte_flags, intel_private.gtt + entry);

}

}





static bool intel_enable_gtt(void)

bool intel_enable_gtt(void)

{

{

	u32 gma_addr;

	u8 __iomem *reg;

	u8 __iomem *reg;





	if (INTEL_GTT_GEN <= 2)

		pci_read_config_dword(intel_private.pcidev, I810_GMADDR,

				      &gma_addr);

	else

		pci_read_config_dword(intel_private.pcidev, I915_GMADDR,

				      &gma_addr);



	intel_private.gma_bus_addr = (gma_addr & PCI_BASE_ADDRESS_MEM_MASK);



	if (INTEL_GTT_GEN >= 6)

	if (INTEL_GTT_GEN >= 6)

	    return true;

	    return true;
@@ -823,6 +823,7 @@ static bool intel_enable_gtt(void) 




	return true;

	return true;

}

}

EXPORT_SYMBOL(intel_enable_gtt);





static int i830_setup(void)

static int i830_setup(void)

{

{
@@ -860,7 +861,7 @@ static int intel_fake_agp_configure(void) 
	    return -EIO;

	    return -EIO;





	intel_private.clear_fake_agp = true;

	intel_private.clear_fake_agp = true;

	agp_bridge->gart_bus_addr = intel_private.gma_bus_addr;

	agp_bridge->gart_bus_addr = intel_private.base.gma_bus_addr;





	return 0;

	return 0;

}

}
@@ -1182,9 +1183,17 @@ static void gen6_write_entry(dma_addr_t addr, unsigned int entry, 
static void valleyview_write_entry(dma_addr_t addr, unsigned int entry,

static void valleyview_write_entry(dma_addr_t addr, unsigned int entry,

				   unsigned int flags)

				   unsigned int flags)

{

{

	unsigned int type_mask = flags & ~AGP_USER_CACHED_MEMORY_GFDT;

	unsigned int gfdt = flags & AGP_USER_CACHED_MEMORY_GFDT;

	u32 pte_flags;

	u32 pte_flags;





	if (type_mask == AGP_USER_MEMORY)

		pte_flags = GEN6_PTE_UNCACHED | I810_PTE_VALID;

		pte_flags = GEN6_PTE_UNCACHED | I810_PTE_VALID;

	else {

		pte_flags = GEN6_PTE_LLC | I810_PTE_VALID;

		if (gfdt)

			pte_flags |= GEN6_PTE_GFDT;

	}





	/* gen6 has bit11-4 for physical addr bit39-32 */

	/* gen6 has bit11-4 for physical addr bit39-32 */

	addr |= (addr >> 28) & 0xff0;

	addr |= (addr >> 28) & 0xff0;
@@ -1244,6 +1253,7 @@ static int i9xx_setup(void) 
		switch (INTEL_GTT_GEN) {

		switch (INTEL_GTT_GEN) {

		case 5:

		case 5:

		case 6:

		case 6:

		case 7:

			gtt_offset = MB(2);

			gtt_offset = MB(2);

			break;

			break;

		case 4:

		case 4:
@@ -1379,7 +1389,6 @@ static const struct intel_gtt_driver valleyview_gtt_driver = { 
	.write_entry = valleyview_write_entry,

	.write_entry = valleyview_write_entry,

	.dma_mask_size = 40,

	.dma_mask_size = 40,

	.check_flags = gen6_check_flags,

	.check_flags = gen6_check_flags,

	.chipset_flush = i9xx_chipset_flush,

};

};





/* Table to describe Intel GMCH and AGP/PCIE GART drivers.  At least one of

/* Table to describe Intel GMCH and AGP/PCIE GART drivers.  At least one of
@@ -1523,14 +1532,32 @@ static int find_gmch(u16 device) 
	return 1;

	return 1;

}

}





int intel_gmch_probe(struct pci_dev *pdev,

int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,

		     struct agp_bridge_data *bridge)

		     struct agp_bridge_data *bridge)

{

{

	int i, mask;

	int i, mask;

	intel_private.driver = NULL;



	/*

	 * Can be called from the fake agp driver but also directly from

	 * drm/i915.ko. Hence we need to check whether everything is set up

	 * already.

	 */

	if (intel_private.driver) {

		intel_private.refcount++;

		return 1;

	}





	for (i = 0; intel_gtt_chipsets[i].name != NULL; i++) {

	for (i = 0; intel_gtt_chipsets[i].name != NULL; i++) {

		if (find_gmch(intel_gtt_chipsets[i].gmch_chip_id)) {

		if (gpu_pdev) {

			if (gpu_pdev->device ==

			    intel_gtt_chipsets[i].gmch_chip_id) {

				intel_private.pcidev = pci_dev_get(gpu_pdev);

				intel_private.driver =

					intel_gtt_chipsets[i].gtt_driver;



				break;

			}

		} else if (find_gmch(intel_gtt_chipsets[i].gmch_chip_id)) {

			intel_private.driver =

			intel_private.driver =

				intel_gtt_chipsets[i].gtt_driver;

				intel_gtt_chipsets[i].gtt_driver;

			break;

			break;
@@ -1540,13 +1567,17 @@ int intel_gmch_probe(struct pci_dev *pdev, 
	if (!intel_private.driver)

	if (!intel_private.driver)

		return 0;

		return 0;





	intel_private.refcount++;



	if (bridge) {

		bridge->driver = &intel_fake_agp_driver;

		bridge->driver = &intel_fake_agp_driver;

		bridge->dev_private_data = &intel_private;

		bridge->dev_private_data = &intel_private;

	bridge->dev = pdev;

		bridge->dev = bridge_pdev;

	}





	intel_private.bridge_dev = pci_dev_get(pdev);

	intel_private.bridge_dev = pci_dev_get(bridge_pdev);





	dev_info(&pdev->dev, "Intel %s Chipset\n", intel_gtt_chipsets[i].name);

	dev_info(&bridge_pdev->dev, "Intel %s Chipset\n", intel_gtt_chipsets[i].name);





	mask = intel_private.driver->dma_mask_size;

	mask = intel_private.driver->dma_mask_size;

	if (pci_set_dma_mask(intel_private.pcidev, DMA_BIT_MASK(mask)))

	if (pci_set_dma_mask(intel_private.pcidev, DMA_BIT_MASK(mask)))
@@ -1556,11 +1587,11 @@ int intel_gmch_probe(struct pci_dev *pdev, 
		pci_set_consistent_dma_mask(intel_private.pcidev,

		pci_set_consistent_dma_mask(intel_private.pcidev,

					    DMA_BIT_MASK(mask));

					    DMA_BIT_MASK(mask));





	/*if (bridge->driver == &intel_810_driver)

	if (intel_gtt_init() != 0) {

		return 1;*/

		intel_gmch_remove();





	if (intel_gtt_init() != 0)

		return 0;

		return 0;

	}





	return 1;

	return 1;

}

}
@@ -1579,12 +1610,16 @@ void intel_gtt_chipset_flush(void) 
}

}

EXPORT_SYMBOL(intel_gtt_chipset_flush);

EXPORT_SYMBOL(intel_gtt_chipset_flush);





void intel_gmch_remove(struct pci_dev *pdev)

void intel_gmch_remove(void)

{

{

	if (--intel_private.refcount)

		return;



	if (intel_private.pcidev)

	if (intel_private.pcidev)

		pci_dev_put(intel_private.pcidev);

		pci_dev_put(intel_private.pcidev);

	if (intel_private.bridge_dev)

	if (intel_private.bridge_dev)

		pci_dev_put(intel_private.bridge_dev);

		pci_dev_put(intel_private.bridge_dev);

	intel_private.driver = NULL;

}

}

EXPORT_SYMBOL(intel_gmch_remove);

EXPORT_SYMBOL(intel_gmch_remove);

drivers/gpu/drm/ast/ast_mode.c

+3 −3
Original line number Original line Diff line number Diff line
@@ -460,7 +460,7 @@ static void ast_crtc_dpms(struct drm_crtc *crtc, int mode) 
}

}





static bool ast_crtc_mode_fixup(struct drm_crtc *crtc,

static bool ast_crtc_mode_fixup(struct drm_crtc *crtc,

				  struct drm_display_mode *mode,

				const struct drm_display_mode *mode,

				struct drm_display_mode *adjusted_mode)

				struct drm_display_mode *adjusted_mode)

{

{

	return true;

	return true;
@@ -680,7 +680,7 @@ static void ast_encoder_dpms(struct drm_encoder *encoder, int mode) 
}

}





static bool ast_mode_fixup(struct drm_encoder *encoder,

static bool ast_mode_fixup(struct drm_encoder *encoder,

			   struct drm_display_mode *mode,

			   const struct drm_display_mode *mode,

			   struct drm_display_mode *adjusted_mode)

			   struct drm_display_mode *adjusted_mode)

{

{

	return true;

	return true;

drivers/gpu/drm/cirrus/cirrus_mode.c

+3 −3
Original line number Original line Diff line number Diff line
@@ -97,7 +97,7 @@ static void cirrus_crtc_dpms(struct drm_crtc *crtc, int mode) 
 * to just pass that straight through, so this does nothing

 * to just pass that straight through, so this does nothing

 */

 */

static bool cirrus_crtc_mode_fixup(struct drm_crtc *crtc,

static bool cirrus_crtc_mode_fixup(struct drm_crtc *crtc,

				   struct drm_display_mode *mode,

				   const struct drm_display_mode *mode,

				   struct drm_display_mode *adjusted_mode)

				   struct drm_display_mode *adjusted_mode)

{

{

	return true;

	return true;
@@ -429,7 +429,7 @@ void cirrus_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, 








static bool cirrus_encoder_mode_fixup(struct drm_encoder *encoder,

static bool cirrus_encoder_mode_fixup(struct drm_encoder *encoder,

				  struct drm_display_mode *mode,

				      const struct drm_display_mode *mode,

				      struct drm_display_mode *adjusted_mode)

				      struct drm_display_mode *adjusted_mode)

{

{

	return true;

	return true;