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Commit bcc66c0b authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
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Merge 3.5-rc4 into staging-next



This picks up the staging changes made in 3.5-rc4 so that everyone can sync up
properly.

Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parents 1c1b8621 6b16351a
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@@ -111,6 +111,7 @@ Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de>
Uwe Kleine-König <ukl@pengutronix.de>
Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com>
Valdis Kletnieks <Valdis.Kletnieks@vt.edu>
Viresh Kumar <viresh.linux@gmail.com> <viresh.kumar@st.com>
Takashi YOSHII <takashi.yoshii.zj@renesas.com>
Yusuke Goda <goda.yusuke@renesas.com>
Gustavo Padovan <gustavo@las.ic.unicamp.br>
+1 −1
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@@ -60,4 +60,4 @@ Introduction
  Document Author
  ---------------

  Viresh Kumar <viresh.kumar@st.com>, (c) 2010-2012 ST Microelectronics
  Viresh Kumar <viresh.linux@gmail.com>, (c) 2010-2012 ST Microelectronics
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Pinctrl-based I2C Bus Mux

This binding describes an I2C bus multiplexer that uses pin multiplexing to
route the I2C signals, and represents the pin multiplexing configuration
using the pinctrl device tree bindings.

                                 +-----+  +-----+
                                 | dev |  | dev |
    +------------------------+   +-----+  +-----+
    | SoC                    |      |        |
    |                   /----|------+--------+
    |   +---+   +------+     | child bus A, on first set of pins
    |   |I2C|---|Pinmux|     |
    |   +---+   +------+     | child bus B, on second set of pins
    |                   \----|------+--------+--------+
    |                        |      |        |        |
    +------------------------+  +-----+  +-----+  +-----+
                                | dev |  | dev |  | dev |
                                +-----+  +-----+  +-----+

Required properties:
- compatible: i2c-mux-pinctrl
- i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
  port is connected to.

Also required are:

* Standard pinctrl properties that specify the pin mux state for each child
  bus. See ../pinctrl/pinctrl-bindings.txt.

* Standard I2C mux properties. See mux.txt in this directory.

* I2C child bus nodes. See mux.txt in this directory.

For each named state defined in the pinctrl-names property, an I2C child bus
will be created. I2C child bus numbers are assigned based on the index into
the pinctrl-names property.

The only exception is that no bus will be created for a state named "idle". If
such a state is defined, it must be the last entry in pinctrl-names. For
example:

	pinctrl-names = "ddc", "pta", "idle"  ->  ddc = bus 0, pta = bus 1
	pinctrl-names = "ddc", "idle", "pta"  ->  Invalid ("idle" not last)
	pinctrl-names = "idle", "ddc", "pta"  ->  Invalid ("idle" not last)

Whenever an access is made to a device on a child bus, the relevant pinctrl
state will be programmed into hardware.

If an idle state is defined, whenever an access is not being made to a device
on a child bus, the idle pinctrl state will be programmed into hardware.

If an idle state is not defined, the most recently used pinctrl state will be
left programmed into hardware whenever no access is being made of a device on
a child bus.

Example:

	i2cmux {
		compatible = "i2c-mux-pinctrl";
		#address-cells = <1>;
		#size-cells = <0>;

		i2c-parent = <&i2c1>;

		pinctrl-names = "ddc", "pta", "idle";
		pinctrl-0 = <&state_i2cmux_ddc>;
		pinctrl-1 = <&state_i2cmux_pta>;
		pinctrl-2 = <&state_i2cmux_idle>;

		i2c@0 {
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <0>;

			eeprom {
				compatible = "eeprom";
				reg = <0x50>;
			};
		};

		i2c@1 {
			reg = <1>;
			#address-cells = <1>;
			#size-cells = <0>;

			eeprom {
				compatible = "eeprom";
				reg = <0x50>;
			};
		};
	};
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@@ -6,7 +6,9 @@ Supported chips:
    Prefix: 'coretemp'
    CPUID: family 0x6, models 0xe (Pentium M DC), 0xf (Core 2 DC 65nm),
                              0x16 (Core 2 SC 65nm), 0x17 (Penryn 45nm),
                              0x1a (Nehalem), 0x1c (Atom), 0x1e (Lynnfield)
                              0x1a (Nehalem), 0x1c (Atom), 0x1e (Lynnfield),
                              0x26 (Tunnel Creek Atom), 0x27 (Medfield Atom),
                              0x36 (Cedar Trail Atom)
    Datasheet: Intel 64 and IA-32 Architectures Software Developer's Manual
               Volume 3A: System Programming Guide
               http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
@@ -52,6 +54,17 @@ Some information comes from ark.intel.com

Process		Processor					TjMax(C)

22nm		Core i5/i7 Processors
		i7 3920XM, 3820QM, 3720QM, 3667U, 3520M		105
		i5 3427U, 3360M/3320M				105
		i7 3770/3770K					105
		i5 3570/3570K, 3550, 3470/3450			105
		i7 3770S					103
		i5 3570S/3550S, 3475S/3470S/3450S		103
		i7 3770T					94
		i5 3570T					94
		i5 3470T					91

32nm		Core i3/i5/i7 Processors
		i7 660UM/640/620, 640LM/620, 620M, 610E		105
		i5 540UM/520/430, 540M/520/450/430		105
@@ -65,6 +78,11 @@ Process Processor TjMax(C)
		U3400						105
		P4505/P4500 					90

32nm		Atom Processors
		Z2460						90
		D2700/2550/2500					100
		N2850/2800/2650/2600				100

45nm		Xeon Processors 5400 Quad-Core
		X5492, X5482, X5472, X5470, X5460, X5450	85
		E5472, E5462, E5450/40/30/20/10/05		85
@@ -85,6 +103,8 @@ Process Processor TjMax(C)
		N475/470/455/450				100
		N280/270					90
		330/230						125
		E680/660/640/620				90
		E680T/660T/640T/620T				110

45nm		Core2 Processors
		Solo ULV SU3500/3300				100
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@@ -2543,6 +2543,15 @@ bytes respectively. Such letter suffixes can also be entirely omitted.

	sched_debug	[KNL] Enables verbose scheduler debug messages.

	skew_tick=	[KNL] Offset the periodic timer tick per cpu to mitigate
			xtime_lock contention on larger systems, and/or RCU lock
			contention on all systems with CONFIG_MAXSMP set.
			Format: { "0" | "1" }
			0 -- disable. (may be 1 via CONFIG_CMDLINE="skew_tick=1"
			1 -- enable.
			Note: increases power consumption, thus should only be
			enabled if running jitter sensitive (HPC/RT) workloads.

	security=	[SECURITY] Choose a security module to enable at boot.
			If this boot parameter is not specified, only the first
			security module asking for security registration will be
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