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Commit b8c8f665 authored by David Daney's avatar David Daney Committed by Ralf Baechle
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MIPS: Add CPU identifiers and probing for Cavium CN73xx and CNF75xx processors. 



Add new processor identifiers for Cavium CN73xx and CNF75xx
processors, and probe for them in cpu-probe.c

Signed-off-by: default avatarDavid Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12311/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 34ae8e36

arch/mips/include/asm/cpu.h

+2 −0
Original line number Diff line number Diff line
@@ -169,6 +169,8 @@ 
#define PRID_IMP_CAVIUM_CNF71XX 0x9400

#define PRID_IMP_CAVIUM_CN78XX 0x9500

#define PRID_IMP_CAVIUM_CN70XX 0x9600

#define PRID_IMP_CAVIUM_CN73XX 0x9700

#define PRID_IMP_CAVIUM_CNF75XX 0x9800



/*

 * These are the PRID's for when 23:16 == PRID_COMP_INGENIC_*

arch/mips/kernel/cpu-probe.c

+2 −0
Original line number Diff line number Diff line
@@ -1481,6 +1481,8 @@ static inline void cpu_probe_cavium(struct cpuinfo_mips *c, unsigned int cpu) 
		set_elf_platform(cpu, "octeon2");

		break;

	case PRID_IMP_CAVIUM_CN70XX:

	case PRID_IMP_CAVIUM_CN73XX:

	case PRID_IMP_CAVIUM_CNF75XX:

	case PRID_IMP_CAVIUM_CN78XX:

		c->cputype = CPU_CAVIUM_OCTEON3;

		__cpu_name[cpu] = "Cavium Octeon III";