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Commit b8700d50 authored by Peter De Schrijver's avatar Peter De Schrijver
Browse files

clk: tegra: add common infra for DT clocks 



Introduce a common infrastructure for sharing clock initialization between
SoCs.

Signed-off-by: default avatarPeter De Schrijver <pdeschrijver@nvidia.com>
parent a59ba956

drivers/clk/tegra/clk.c

+9 −0
Original line number Diff line number Diff line
@@ -212,6 +212,15 @@ void __init tegra_add_of_provider(struct device_node *np) 
	of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);

}



struct clk ** __init tegra_lookup_dt_id(int clk_id,

					struct tegra_clk *tegra_clk)

{

	if (tegra_clk[clk_id].present)

		return &clks[tegra_clk[clk_id].dt_id];

	else

		return NULL;

}



tegra_clk_apply_init_table_func tegra_clk_apply_init_table;



void __init tegra_clocks_apply_init_table(void)

drivers/clk/tegra/clk.h

+7 −0
Original line number Diff line number Diff line
@@ -568,6 +568,11 @@ struct tegra_clk_duplicate { 
		},				\

	}



struct tegra_clk {

	int			dt_id;

	bool			present;

};



void tegra_init_from_table(struct tegra_clk_init_table *tbl,

		struct clk *clks[], int clk_max);
@@ -577,6 +582,8 @@ void tegra_init_dup_clks(struct tegra_clk_duplicate *dup_list, 
struct tegra_clk_periph_regs *get_reg_bank(int clkid);

struct clk **tegra_clk_init(int num, int periph_banks);



struct clk **tegra_lookup_dt_id(int clk_id, struct tegra_clk *tegra_clk);



void tegra_add_of_provider(struct device_node *np);



void tegra114_clock_tune_cpu_trimmers_high(void);