Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit b84a76ae authored by Lokesh Vutla's avatar Lokesh Vutla Committed by Paul Walmsley
Browse files

ARM: OMAP: AM33xx: clock: Add RNG clock data 



Add clock data for RNG module on AM33xx SoC.

Signed-off-by: default avatarLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
parent 1721c702

arch/arm/mach-omap2/cclock33xx_data.c

+5 −0
Original line number Diff line number Diff line
@@ -421,6 +421,10 @@ static struct clk aes0_fck; 
DEFINE_STRUCT_CLK_HW_OMAP(aes0_fck, NULL);

DEFINE_STRUCT_CLK(aes0_fck, dpll_core_ck_parents, clk_ops_null);



static struct clk rng_fck;

DEFINE_STRUCT_CLK_HW_OMAP(rng_fck, NULL);

DEFINE_STRUCT_CLK(rng_fck, dpll_core_ck_parents, clk_ops_null);



/*

 * Modules clock nodes

 *
@@ -966,6 +970,7 @@ static struct omap_clk am33xx_clks[] = { 
	CLK(NULL,	"smartreflex1_fck",	&smartreflex1_fck),

	CLK(NULL,	"sha0_fck",		&sha0_fck),

	CLK(NULL,	"aes0_fck",		&aes0_fck),

	CLK(NULL,	"rng_fck",		&rng_fck),

	CLK(NULL,	"timer1_fck",		&timer1_fck),

	CLK(NULL,	"timer2_fck",		&timer2_fck),

	CLK(NULL,	"timer3_fck",		&timer3_fck),