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Commit b7884eb4 authored by Daniel Vetter's avatar Daniel Vetter
Browse files

drm/i915: hold forcewake around ring hw init 



Empirical evidence suggests that we need to: On at least one ivb
machine when running the hangman i-g-t test, the rings don't properly
initialize properly - the RING_START registers seems to be stuck at
all zeros.

Holding forcewake around this register init sequences makes chip reset
reliable again. Note that this is not the first such issue:

commit f01db988
Author: Sean Paul <seanpaul@chromium.org>
Date:   Fri Mar 16 12:43:22 2012 -0400

    drm/i915: Add wait_for in init_ring_common

added delay loops to make RING_START and RING_CTL initialization
reliable on the blt ring at boot-up. So I guess it won't hurt if we do
this unconditionally for all force_wake needing gpus.

To avoid copy&pasting of the HAS_FORCE_WAKE check I've added a new
intel_info bit for that.

v2: Fixup missing commas in static struct and properly handling the
error case in init_ring_common, both noticed by Jani Nikula.

Cc: stable@vger.kernel.org
Reported-and-tested-by: default avatarYang Guang <guang.a.yang@intel.com>
Reviewed-by: default avatarEugeni Dodonov <eugeni.dodonov@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=50522


Signed-Off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 3eef8918

drivers/gpu/drm/i915/i915_drv.c

+9 −4
Original line number Diff line number Diff line
@@ -233,6 +233,7 @@ static const struct intel_device_info intel_sandybridge_d_info = { 
	.has_blt_ring = 1,

	.has_llc = 1,

	.has_pch_split = 1,

	.has_force_wake = 1,

};



static const struct intel_device_info intel_sandybridge_m_info = {
@@ -243,6 +244,7 @@ static const struct intel_device_info intel_sandybridge_m_info = { 
	.has_blt_ring = 1,

	.has_llc = 1,

	.has_pch_split = 1,

	.has_force_wake = 1,

};



static const struct intel_device_info intel_ivybridge_d_info = {
@@ -252,6 +254,7 @@ static const struct intel_device_info intel_ivybridge_d_info = { 
	.has_blt_ring = 1,

	.has_llc = 1,

	.has_pch_split = 1,

	.has_force_wake = 1,

};



static const struct intel_device_info intel_ivybridge_m_info = {
@@ -262,6 +265,7 @@ static const struct intel_device_info intel_ivybridge_m_info = { 
	.has_blt_ring = 1,

	.has_llc = 1,

	.has_pch_split = 1,

	.has_force_wake = 1,

};



static const struct intel_device_info intel_valleyview_m_info = {
@@ -289,6 +293,7 @@ static const struct intel_device_info intel_haswell_d_info = { 
	.has_blt_ring = 1,

	.has_llc = 1,

	.has_pch_split = 1,

	.has_force_wake = 1,

};



static const struct intel_device_info intel_haswell_m_info = {
@@ -298,6 +303,7 @@ static const struct intel_device_info intel_haswell_m_info = { 
	.has_blt_ring = 1,

	.has_llc = 1,

	.has_pch_split = 1,

	.has_force_wake = 1,

};



static const struct pci_device_id pciidlist[] = {		/* aka */
@@ -1139,10 +1145,9 @@ MODULE_LICENSE("GPL and additional rights"); 


/* We give fast paths for the really cool registers */

#define NEEDS_FORCE_WAKE(dev_priv, reg) \

       (((dev_priv)->info->gen >= 6) && \

	((HAS_FORCE_WAKE((dev_priv)->dev)) && \

	 ((reg) < 0x40000) &&            \

        ((reg) != FORCEWAKE)) && \

       (!IS_VALLEYVIEW((dev_priv)->dev))

	 ((reg) != FORCEWAKE))



#define __i915_read(x, y) \

u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \

drivers/gpu/drm/i915/i915_drv.h

+3 −0
Original line number Diff line number Diff line
@@ -285,6 +285,7 @@ struct intel_device_info { 
	u8 is_ivybridge:1;

	u8 is_valleyview:1;

	u8 has_pch_split:1;

	u8 has_force_wake:1;

	u8 is_haswell:1;

	u8 has_fbc:1;

	u8 has_pipe_cxsr:1;
@@ -1098,6 +1099,8 @@ struct drm_i915_file_private { 
#define HAS_PCH_CPT(dev) (INTEL_PCH_TYPE(dev) == PCH_CPT)

#define HAS_PCH_IBX(dev) (INTEL_PCH_TYPE(dev) == PCH_IBX)



#define HAS_FORCE_WAKE(dev) (INTEL_INFO(dev)->has_force_wake)



#include "i915_trace.h"



/**

drivers/gpu/drm/i915/intel_ringbuffer.c

+13 −3
Original line number Diff line number Diff line
@@ -266,10 +266,15 @@ u32 intel_ring_get_active_head(struct intel_ring_buffer *ring) 


static int init_ring_common(struct intel_ring_buffer *ring)

{

	drm_i915_private_t *dev_priv = ring->dev->dev_private;

	struct drm_device *dev = ring->dev;

	drm_i915_private_t *dev_priv = dev->dev_private;

	struct drm_i915_gem_object *obj = ring->obj;

	int ret = 0;

	u32 head;



	if (HAS_FORCE_WAKE(dev))

		gen6_gt_force_wake_get(dev_priv);



	/* Stop the ring if it's running. */

	I915_WRITE_CTL(ring, 0);

	I915_WRITE_HEAD(ring, 0);
@@ -317,7 +322,8 @@ static int init_ring_common(struct intel_ring_buffer *ring) 
				I915_READ_HEAD(ring),

				I915_READ_TAIL(ring),

				I915_READ_START(ring));

		return -EIO;

		ret = -EIO;

		goto out;

	}



	if (!drm_core_check_feature(ring->dev, DRIVER_MODESET))
@@ -329,7 +335,11 @@ static int init_ring_common(struct intel_ring_buffer *ring) 
		ring->last_retired_head = -1;

	}



	return 0;

out:

	if (HAS_FORCE_WAKE(dev))

		gen6_gt_force_wake_put(dev_priv);



	return ret;

}



static int