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Commit b6729deb authored by Eric Miao's avatar Eric Miao
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[ARM] pxa: make more SSCR0 bit definitions visible on multiple processors 



The only exclusive definitions are SSCR0_SCR and SSCR0_SerClkDiv(), loosen
that exclusive #ifdef .. #else .. #endif to allow other definitions to be
visible when slected multiple processors. This helps to pass the building
of pxa-ssp.c.

Signed-off-by: default avatarEric Miao <eric.miao@marvell.com>
parent ec971c91

arch/arm/mach-pxa/include/mach/regs-ssp.h

+3 −0
Original line number Diff line number Diff line
@@ -41,6 +41,9 @@ 
#elif defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)

#define SSCR0_SCR	(0x000fff00)	/* Serial Clock Rate (mask) */

#define SSCR0_SerClkDiv(x) (((x) - 1) << 8) /* Divisor [1..4096] */

#endif



#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)

#define SSCR0_EDSS	(1 << 20)	/* Extended data size select */

#define SSCR0_NCS	(1 << 21)	/* Network clock select */

#define SSCR0_RIM	(1 << 22)	/* Receive FIFO overrrun interrupt mask */