phy: sun4i: add support for A64 usb phy (b3e0d141) · Commits · e / devices / android_kernel_teracube_2e

drivers/phy/phy-sun4i-usb.c

+29 −6

Original line number	Original line	Diff line number	Diff line
	@@ -50,7 +50,7 @@
	#define REG_PHYCTL_A33 0x10		#define REG_PHYCTL_A33 0x10
	#define REG_PHY_UNK_H3 0x20		#define REG_PHY_UNK_H3 0x20

	#define REG_PMU_UNK_H3 0x10		#define REG_PMU_UNK1 0x10

	#define PHYCTL_DATA BIT(7)		#define PHYCTL_DATA BIT(7)

	@@ -98,6 +98,7 @@ enum sun4i_usb_phy_type {
	sun6i_a31_phy,		sun6i_a31_phy,
	sun8i_a33_phy,		sun8i_a33_phy,
	sun8i_h3_phy,		sun8i_h3_phy,
			sun50i_a64_phy,
	};		};

	struct sun4i_usb_phy_cfg {		struct sun4i_usb_phy_cfg {
	@@ -106,6 +107,7 @@ struct sun4i_usb_phy_cfg {
	u32 disc_thresh;		u32 disc_thresh;
	u8 phyctl_offset;		u8 phyctl_offset;
	bool dedicated_clocks;		bool dedicated_clocks;
			bool enable_pmu_unk1;
	};		};

	struct sun4i_usb_phy_data {		struct sun4i_usb_phy_data {
	@@ -183,8 +185,9 @@ static void sun4i_usb_phy_write(struct sun4i_usb_phy *phy, u32 addr, u32 data,

	mutex_lock(&phy_data->mutex);		mutex_lock(&phy_data->mutex);

	if (phy_data->cfg->type == sun8i_a33_phy) {		if (phy_data->cfg->type == sun8i_a33_phy \|\|
	/* A33 needs us to set phyctl to 0 explicitly */		phy_data->cfg->type == sun50i_a64_phy) {
			/* A33 or A64 needs us to set phyctl to 0 explicitly */
	writel(0, phyctl);		writel(0, phyctl);
	}		}

	@@ -258,14 +261,16 @@ static int sun4i_usb_phy_init(struct phy *_phy)
	return ret;		return ret;
	}		}

			if (data->cfg->enable_pmu_unk1) {
			val = readl(phy->pmu + REG_PMU_UNK1);
			writel(val & ~2, phy->pmu + REG_PMU_UNK1);
			}

	if (data->cfg->type == sun8i_h3_phy) {		if (data->cfg->type == sun8i_h3_phy) {
	if (phy->index == 0) {		if (phy->index == 0) {
	val = readl(data->base + REG_PHY_UNK_H3);		val = readl(data->base + REG_PHY_UNK_H3);
	writel(val & ~1, data->base + REG_PHY_UNK_H3);		writel(val & ~1, data->base + REG_PHY_UNK_H3);
	}		}

	val = readl(phy->pmu + REG_PMU_UNK_H3);
	writel(val & ~2, phy->pmu + REG_PMU_UNK_H3);
	} else {		} else {
	/* Enable USB 45 Ohm resistor calibration */		/* Enable USB 45 Ohm resistor calibration */
	if (phy->index == 0)		if (phy->index == 0)
	@@ -737,6 +742,7 @@ static const struct sun4i_usb_phy_cfg sun4i_a10_cfg = {
	.disc_thresh = 3,		.disc_thresh = 3,
	.phyctl_offset = REG_PHYCTL_A10,		.phyctl_offset = REG_PHYCTL_A10,
	.dedicated_clocks = false,		.dedicated_clocks = false,
			.enable_pmu_unk1 = false,
	};		};

	static const struct sun4i_usb_phy_cfg sun5i_a13_cfg = {		static const struct sun4i_usb_phy_cfg sun5i_a13_cfg = {
	@@ -745,6 +751,7 @@ static const struct sun4i_usb_phy_cfg sun5i_a13_cfg = {
	.disc_thresh = 2,		.disc_thresh = 2,
	.phyctl_offset = REG_PHYCTL_A10,		.phyctl_offset = REG_PHYCTL_A10,
	.dedicated_clocks = false,		.dedicated_clocks = false,
			.enable_pmu_unk1 = false,
	};		};

	static const struct sun4i_usb_phy_cfg sun6i_a31_cfg = {		static const struct sun4i_usb_phy_cfg sun6i_a31_cfg = {
	@@ -753,6 +760,7 @@ static const struct sun4i_usb_phy_cfg sun6i_a31_cfg = {
	.disc_thresh = 3,		.disc_thresh = 3,
	.phyctl_offset = REG_PHYCTL_A10,		.phyctl_offset = REG_PHYCTL_A10,
	.dedicated_clocks = true,		.dedicated_clocks = true,
			.enable_pmu_unk1 = false,
	};		};

	static const struct sun4i_usb_phy_cfg sun7i_a20_cfg = {		static const struct sun4i_usb_phy_cfg sun7i_a20_cfg = {
	@@ -761,6 +769,7 @@ static const struct sun4i_usb_phy_cfg sun7i_a20_cfg = {
	.disc_thresh = 2,		.disc_thresh = 2,
	.phyctl_offset = REG_PHYCTL_A10,		.phyctl_offset = REG_PHYCTL_A10,
	.dedicated_clocks = false,		.dedicated_clocks = false,
			.enable_pmu_unk1 = false,
	};		};

	static const struct sun4i_usb_phy_cfg sun8i_a23_cfg = {		static const struct sun4i_usb_phy_cfg sun8i_a23_cfg = {
	@@ -769,6 +778,7 @@ static const struct sun4i_usb_phy_cfg sun8i_a23_cfg = {
	.disc_thresh = 3,		.disc_thresh = 3,
	.phyctl_offset = REG_PHYCTL_A10,		.phyctl_offset = REG_PHYCTL_A10,
	.dedicated_clocks = true,		.dedicated_clocks = true,
			.enable_pmu_unk1 = false,
	};		};

	static const struct sun4i_usb_phy_cfg sun8i_a33_cfg = {		static const struct sun4i_usb_phy_cfg sun8i_a33_cfg = {
	@@ -777,6 +787,7 @@ static const struct sun4i_usb_phy_cfg sun8i_a33_cfg = {
	.disc_thresh = 3,		.disc_thresh = 3,
	.phyctl_offset = REG_PHYCTL_A33,		.phyctl_offset = REG_PHYCTL_A33,
	.dedicated_clocks = true,		.dedicated_clocks = true,
			.enable_pmu_unk1 = false,
	};		};

	static const struct sun4i_usb_phy_cfg sun8i_h3_cfg = {		static const struct sun4i_usb_phy_cfg sun8i_h3_cfg = {
	@@ -784,6 +795,16 @@ static const struct sun4i_usb_phy_cfg sun8i_h3_cfg = {
	.type = sun8i_h3_phy,		.type = sun8i_h3_phy,
	.disc_thresh = 3,		.disc_thresh = 3,
	.dedicated_clocks = true,		.dedicated_clocks = true,
			.enable_pmu_unk1 = true,
			};

			static const struct sun4i_usb_phy_cfg sun50i_a64_cfg = {
			.num_phys = 2,
			.type = sun50i_a64_phy,
			.disc_thresh = 3,
			.phyctl_offset = REG_PHYCTL_A33,
			.dedicated_clocks = true,
			.enable_pmu_unk1 = true,
	};		};

	static const struct of_device_id sun4i_usb_phy_of_match[] = {		static const struct of_device_id sun4i_usb_phy_of_match[] = {
	@@ -794,6 +815,8 @@ static const struct of_device_id sun4i_usb_phy_of_match[] = {
	{ .compatible = "allwinner,sun8i-a23-usb-phy", .data = &sun8i_a23_cfg },		{ .compatible = "allwinner,sun8i-a23-usb-phy", .data = &sun8i_a23_cfg },
	{ .compatible = "allwinner,sun8i-a33-usb-phy", .data = &sun8i_a33_cfg },		{ .compatible = "allwinner,sun8i-a33-usb-phy", .data = &sun8i_a33_cfg },
	{ .compatible = "allwinner,sun8i-h3-usb-phy", .data = &sun8i_h3_cfg },		{ .compatible = "allwinner,sun8i-h3-usb-phy", .data = &sun8i_h3_cfg },
			{ .compatible = "allwinner,sun50i-a64-usb-phy",
			.data = &sun50i_a64_cfg},
	{ },		{ },
	};		};
	MODULE_DEVICE_TABLE(of, sun4i_usb_phy_of_match);		MODULE_DEVICE_TABLE(of, sun4i_usb_phy_of_match);