Loading arch/arm/mach-s3c2410/include/mach/map.h +1 −0 Original line number Diff line number Diff line Loading @@ -110,5 +110,6 @@ #define S3C_PA_UART S3C24XX_PA_UART #define S3C_PA_USBHOST S3C2410_PA_USBHOST #define S3C_PA_HSMMC0 S3C2443_PA_HSMMC #define S3C_PA_NAND S3C24XX_PA_NAND #endif /* __ASM_ARCH_MAP_H */ arch/arm/mach-s3c24a0/include/mach/map.h +1 −0 Original line number Diff line number Diff line Loading @@ -81,5 +81,6 @@ #define S3C_PA_UART S3C24A0_PA_UART #define S3C_PA_IIC S3C24A0_PA_IIC #define S3C_PA_NAND S3C24XX_PA_NAND #endif /* __ASM_ARCH_24A0_MAP_H */ arch/arm/mach-s3c6400/include/mach/map.h +2 −0 Original line number Diff line number Diff line Loading @@ -38,6 +38,7 @@ #define S3C_VA_UART2 S3C_VA_UARTx(2) #define S3C_VA_UART3 S3C_VA_UARTx(3) #define S3C64XX_PA_NAND (0x70200000) #define S3C64XX_PA_FB (0x77100000) #define S3C64XX_PA_USB_HSOTG (0x7C000000) #define S3C64XX_PA_WATCHDOG (0x7E004000) Loading Loading @@ -74,6 +75,7 @@ #define S3C_PA_HSMMC2 S3C64XX_PA_HSMMC2 #define S3C_PA_IIC S3C64XX_PA_IIC0 #define S3C_PA_IIC1 S3C64XX_PA_IIC1 #define S3C_PA_NAND S3C64XX_PA_NAND #define S3C_PA_FB S3C64XX_PA_FB #define S3C_PA_USBHOST S3C64XX_PA_USBHOST #define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG Loading arch/arm/mach-s3c6400/s3c6400.c +2 −0 Original line number Diff line number Diff line Loading @@ -48,6 +48,8 @@ void __init s3c6400_map_io(void) /* the i2c devices are directly compatible with s3c2440 */ s3c_i2c0_setname("s3c2440-i2c"); s3c_device_nand.name = "s3c6400-nand"; } void __init s3c6400_init_clocks(int xtal) Loading arch/arm/mach-s3c6410/cpu.c +2 −0 Original line number Diff line number Diff line Loading @@ -62,6 +62,8 @@ void __init s3c6410_map_io(void) /* the i2c devices are directly compatible with s3c2440 */ s3c_i2c0_setname("s3c2440-i2c"); s3c_i2c1_setname("s3c2440-i2c"); s3c_device_nand.name = "s3c6400-nand"; } void __init s3c6410_init_clocks(int xtal) Loading Loading
arch/arm/mach-s3c2410/include/mach/map.h +1 −0 Original line number Diff line number Diff line Loading @@ -110,5 +110,6 @@ #define S3C_PA_UART S3C24XX_PA_UART #define S3C_PA_USBHOST S3C2410_PA_USBHOST #define S3C_PA_HSMMC0 S3C2443_PA_HSMMC #define S3C_PA_NAND S3C24XX_PA_NAND #endif /* __ASM_ARCH_MAP_H */
arch/arm/mach-s3c24a0/include/mach/map.h +1 −0 Original line number Diff line number Diff line Loading @@ -81,5 +81,6 @@ #define S3C_PA_UART S3C24A0_PA_UART #define S3C_PA_IIC S3C24A0_PA_IIC #define S3C_PA_NAND S3C24XX_PA_NAND #endif /* __ASM_ARCH_24A0_MAP_H */
arch/arm/mach-s3c6400/include/mach/map.h +2 −0 Original line number Diff line number Diff line Loading @@ -38,6 +38,7 @@ #define S3C_VA_UART2 S3C_VA_UARTx(2) #define S3C_VA_UART3 S3C_VA_UARTx(3) #define S3C64XX_PA_NAND (0x70200000) #define S3C64XX_PA_FB (0x77100000) #define S3C64XX_PA_USB_HSOTG (0x7C000000) #define S3C64XX_PA_WATCHDOG (0x7E004000) Loading Loading @@ -74,6 +75,7 @@ #define S3C_PA_HSMMC2 S3C64XX_PA_HSMMC2 #define S3C_PA_IIC S3C64XX_PA_IIC0 #define S3C_PA_IIC1 S3C64XX_PA_IIC1 #define S3C_PA_NAND S3C64XX_PA_NAND #define S3C_PA_FB S3C64XX_PA_FB #define S3C_PA_USBHOST S3C64XX_PA_USBHOST #define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG Loading
arch/arm/mach-s3c6400/s3c6400.c +2 −0 Original line number Diff line number Diff line Loading @@ -48,6 +48,8 @@ void __init s3c6400_map_io(void) /* the i2c devices are directly compatible with s3c2440 */ s3c_i2c0_setname("s3c2440-i2c"); s3c_device_nand.name = "s3c6400-nand"; } void __init s3c6400_init_clocks(int xtal) Loading
arch/arm/mach-s3c6410/cpu.c +2 −0 Original line number Diff line number Diff line Loading @@ -62,6 +62,8 @@ void __init s3c6410_map_io(void) /* the i2c devices are directly compatible with s3c2440 */ s3c_i2c0_setname("s3c2440-i2c"); s3c_i2c1_setname("s3c2440-i2c"); s3c_device_nand.name = "s3c6400-nand"; } void __init s3c6410_init_clocks(int xtal) Loading