Commit b1922a51 authored Sep 25, 2013 by Konrad Rzeszutek Wilk

xen/mmu: Correct PAT MST setting.



Jan Beulich spotted that the PAT MSR settings in the Xen public
document that "the first (PAT6) column was wrong across the
board, and the column for PAT7 was missing altogether."

This updates it to be in sync.

CC: Jan Beulich <jbeulich@suse.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Acked-by: Jan Beulich <jbeulich@suse.com>

parent 4b972806

arch/x86/xen/mmu.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -468,8 +468,8 @@ PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
		* 3 PCD PWT UC UC UC
		* 4 PAT WB WC WB
		* 5 PAT PWT WC WP WT
		* 6 PAT PCD UC- UC UC-
		* 7 PAT PCD PWT UC UC UC
		* 6 PAT PCD UC- rsv UC-
		* 7 PAT PCD PWT UC rsv UC
		*/

		void xen_set_pat(u64 pat)