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Commit b0c936f5 authored by Leilk Liu's avatar Leilk Liu Committed by Matthias Brugger
Browse files

arm64: dts: Add spi bus dts 



This patch adds MT8173 spi bus controllers into device tree.

Signed-off-by: default avatarLeilk Liu <leilk.liu@mediatek.com>
Reviewed-and-Tested-by: default avatarNicolas Boichat <drinkcat@chromium.org>
Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 1ee35c05

arch/arm64/boot/dts/mediatek/mt8173-evb.dts

+18 −0
Original line number Diff line number Diff line
@@ -387,6 +387,24 @@ 
	};

};



&pio {

	spi_pins_a: spi0 {

		pins_spi {

			pinmux = <MT8173_PIN_69_SPI_CK__FUNC_SPI_CK_0_>,

				<MT8173_PIN_70_SPI_MI__FUNC_SPI_MI_0_>,

				<MT8173_PIN_71_SPI_MO__FUNC_SPI_MO_0_>,

				<MT8173_PIN_72_SPI_CS__FUNC_SPI_CS_0_>;

		};

	};

};



&spi {

	pinctrl-names = "default";

	pinctrl-0 = <&spi_pins_a>;

	mediatek,pad-select = <0>;

	status = "okay";

};



&uart0 {

	status = "okay";

};

arch/arm64/boot/dts/mediatek/mt8173.dtsi

+13 −0
Original line number Diff line number Diff line
@@ -365,6 +365,19 @@ 
			status = "disabled";

		};



		spi: spi@1100a000 {

			compatible = "mediatek,mt8173-spi";

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0 0x1100a000 0 0x1000>;

			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>;

			clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,

				 <&topckgen CLK_TOP_SPI_SEL>,

				 <&pericfg CLK_PERI_SPI0>;

			clock-names = "parent-clk", "sel-clk", "spi-clk";

			status = "disabled";

		};



		i2c3: i2c@11010000 {

			compatible = "mediatek,mt8173-i2c";

			reg = <0 0x11010000 0 0x70>,