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Commit b07fed45 authored by Dong Aisheng's avatar Dong Aisheng Committed by Shawn Guo
Browse files

ARM: mx28evk: set a initial clock rate for saif 



Signed-off-by: default avatarDong Aisheng <b29396@freescale.com>
Acked-by: default avatarMarek Vasut <marek.vasut@gmail.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Wolfram Sang <w.sang@pengutronix.de>
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Liam Girdwood <lrg@ti.com>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent 4c0174c5

arch/arm/mach-mxs/clock-mx28.c

+9 −0
Original line number Diff line number Diff line
@@ -814,6 +814,15 @@ int __init mx28_clocks_init(void) 
	clk_set_parent(&saif0_clk, &pll0_clk);

	clk_set_parent(&saif1_clk, &pll0_clk);



	/*

	 * Set an initial clock rate for the saif internal logic to work

	 * properly. This is important when working in EXTMASTER mode that

	 * uses the other saif's BITCLK&LRCLK but it still needs a basic

	 * clock which should be fast enough for the internal logic.

	 */

	clk_set_rate(&saif0_clk, 24000000);

	clk_set_rate(&saif1_clk, 24000000);



	clkdev_add_table(lookups, ARRAY_SIZE(lookups));



	mxs_timer_init(&clk32k_clk, MX28_INT_TIMER0);