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Commit af6f2a7b authored by Allan, Bruce W's avatar Allan, Bruce W Committed by Herbert Xu
Browse files

crypto: qat - fix checkpatch BIT_MACRO issues 



CHECK:BIT_MACRO: Prefer using the BIT macro

Signed-off-by: default avatarBruce Allan <bruce.w.allan@intel.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent f7b3c2d3

drivers/crypto/qat/qat_common/qat_hal.c

+2 −2
Original line number Diff line number Diff line
@@ -434,8 +434,8 @@ static void qat_hal_reset_timestamp(struct icp_qat_fw_loader_handle *handle) 
	SET_GLB_CSR(handle, MISC_CONTROL, misc_ctl | MC_TIMESTAMP_ENABLE);

}



#define ESRAM_AUTO_TINIT (1<<2)

#define ESRAM_AUTO_TINIT_DONE (1<<3)

#define ESRAM_AUTO_TINIT	BIT(2)

#define ESRAM_AUTO_TINIT_DONE	BIT(3)

#define ESRAM_AUTO_INIT_USED_CYCLES (1640)

#define ESRAM_AUTO_INIT_CSR_OFFSET 0xC1C

static int qat_hal_init_esram(struct icp_qat_fw_loader_handle *handle)

drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h

+3 −3
Original line number Diff line number Diff line
@@ -73,11 +73,11 @@ 
/* Error detection and correction */

#define ADF_DH895XCC_AE_CTX_ENABLES(i) (i * 0x1000 + 0x20818)

#define ADF_DH895XCC_AE_MISC_CONTROL(i) (i * 0x1000 + 0x20960)

#define ADF_DH895XCC_ENABLE_AE_ECC_ERR (1 << 28)

#define ADF_DH895XCC_ENABLE_AE_ECC_PARITY_CORR (1 << 24 | 1 << 12)

#define ADF_DH895XCC_ENABLE_AE_ECC_ERR BIT(28)

#define ADF_DH895XCC_ENABLE_AE_ECC_PARITY_CORR (BIT(24) | BIT(12))

#define ADF_DH895XCC_UERRSSMSH(i) (i * 0x4000 + 0x18)

#define ADF_DH895XCC_CERRSSMSH(i) (i * 0x4000 + 0x10)

#define ADF_DH895XCC_ERRSSMSH_EN (1 << 3)

#define ADF_DH895XCC_ERRSSMSH_EN BIT(3)



/* Admin Messages Registers */

#define ADF_DH895XCC_ADMINMSGUR_OFFSET (0x3A000 + 0x574)