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Commit ae17c999 authored by Slava Grigorev's avatar Slava Grigorev Committed by Alex Deucher
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drm/amd/amdgpu: fix 64-bit division 



Signed-off-by: default avatarSlava Grigorev <slava.grigorev@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f8951068

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

+2 −2
Original line number Diff line number Diff line
@@ -942,14 +942,14 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev) 
		goto out;

	}



	tmp = (unsigned int *)((uint64_t)rlc_hdr +

	tmp = (unsigned int *)((uintptr_t)rlc_hdr +

			le32_to_cpu(rlc_hdr->reg_list_format_array_offset_bytes));

	for (i = 0 ; i < (rlc_hdr->reg_list_format_size_bytes >> 2); i++)

		adev->gfx.rlc.register_list_format[i] =	le32_to_cpu(tmp[i]);



	adev->gfx.rlc.register_restore = adev->gfx.rlc.register_list_format + i;



	tmp = (unsigned int *)((uint64_t)rlc_hdr +

	tmp = (unsigned int *)((uintptr_t)rlc_hdr +

			le32_to_cpu(rlc_hdr->reg_list_array_offset_bytes));

	for (i = 0 ; i < (rlc_hdr->reg_list_size_bytes >> 2); i++)

		adev->gfx.rlc.register_restore[i] = le32_to_cpu(tmp[i]);

drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c

+5 −2
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ 
#include <linux/module.h>

#include <linux/slab.h>

#include <linux/fb.h>

#include <asm/div64.h>

#include "linux/delay.h"

#include "pp_acpi.h"

#include "hwmgr.h"
@@ -981,7 +982,8 @@ static int polaris10_calculate_sclk_params(struct pp_hwmgr *hwmgr, 
	sclk_setting->Fcw_int = (uint16_t)((clock << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) / ref_clock);

	temp = clock << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv;

	temp <<= 0x10;

	sclk_setting->Fcw_frac = (uint16_t)(0xFFFF & (temp / ref_clock));

	do_div(temp, ref_clock);

	sclk_setting->Fcw_frac = temp & 0xffff;



	pcc_target_percent = 10; /*  Hardcode 10% for now. */

	pcc_target_freq = clock - (clock * pcc_target_percent / 100);
@@ -995,7 +997,8 @@ static int polaris10_calculate_sclk_params(struct pp_hwmgr *hwmgr, 
		sclk_setting->Fcw1_int = (uint16_t)((ss_target_freq << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) / ref_clock);

		temp = ss_target_freq << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv;

		temp <<= 0x10;

		sclk_setting->Fcw1_frac = (uint16_t)(0xFFFF & (temp / ref_clock));

		do_div(temp, ref_clock);

		sclk_setting->Fcw1_frac = temp & 0xffff;

	}



	return 0;