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Commit ada9f1ca authored by Felix Fietkau's avatar Felix Fietkau Committed by John W. Linville
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ath9k_hw: optimize all descriptor access functions



Because all of the descriptor data structures are marked as __packed, GCC
assumes the worst case wrt. alignment and generates unaligned load/store
instructions on MIPS for access to all fields.
Since descriptors always have to be 4-byte-aligned, we can just mark the
data structures with __aligned(4), which allows GCC to generate much more
efficient code.
Verified through disassembly and OProfile comparisons.

Signed-off-by: default avatarFelix Fietkau <nbd@openwrt.org>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent f0e94b47
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+3 −3
Original line number Diff line number Diff line
@@ -65,7 +65,7 @@ struct ar9003_rxs {
	u32 status9;
	u32 status10;
	u32 status11;
} __packed;
} __packed __aligned(4);

/* Transmit Control Descriptor */
struct ar9003_txc {
@@ -93,7 +93,7 @@ struct ar9003_txc {
	u32 ctl21;  /* DMA control 21 */
	u32 ctl22;  /* DMA control 22 */
	u32 pad[9]; /* pad to cache line (128 bytes/32 dwords) */
} __packed;
} __packed __aligned(4);

struct ar9003_txs {
	u32 ds_info;
@@ -105,7 +105,7 @@ struct ar9003_txs {
	u32 status6;
	u32 status7;
	u32 status8;
} __packed;
} __packed __aligned(4);

void ar9003_hw_attach_mac_ops(struct ath_hw *hw);
void ath9k_hw_set_rx_bufsize(struct ath_hw *ah, u16 buf_size);
+2 −2
Original line number Diff line number Diff line
@@ -237,7 +237,7 @@ struct ath_desc {
	u32 ds_ctl1;
	u32 ds_hw[20];
	void *ds_vdata;
} __packed;
} __packed __aligned(4);

#define ATH9K_TXDESC_CLRDMASK		0x0001
#define ATH9K_TXDESC_NOACK		0x0002
@@ -307,7 +307,7 @@ struct ar5416_desc {
			u32 status8;
		} rx;
	} u;
} __packed;
} __packed __aligned(4);

#define AR5416DESC(_ds)         ((struct ar5416_desc *)(_ds))
#define AR5416DESC_CONST(_ds)   ((const struct ar5416_desc *)(_ds))