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Commit ad76b3f7 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau: teach nouveau_bo_pin() how to force a contig vram allocation 



We have the ability to move buffers around in the kernel if necessary,
and should probably use it rather than failing if userspace passes us
a non-contig buffer for a plane.

The NOUVEAU_GEM_TILE_NONCONTIG flag from userspace will become a mere
initial placement hint once all the relevant paths have been updated.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent ef1df1bc

drivers/gpu/drm/nouveau/dispnv04/crtc.c

+2 −2
Original line number Diff line number Diff line
@@ -614,7 +614,7 @@ nv_crtc_swap_fbs(struct drm_crtc *crtc, struct drm_framebuffer *old_fb) 
	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

	int ret;



	ret = nouveau_bo_pin(nvfb->nvbo, TTM_PL_FLAG_VRAM);

	ret = nouveau_bo_pin(nvfb->nvbo, TTM_PL_FLAG_VRAM, false);

	if (ret == 0) {

		if (disp->image[nv_crtc->index])

			nouveau_bo_unpin(disp->image[nv_crtc->index]);
@@ -1130,7 +1130,7 @@ nv04_crtc_create(struct drm_device *dev, int crtc_num) 
	ret = nouveau_bo_new(dev, 64*64*4, 0x100, TTM_PL_FLAG_VRAM,

			     0, 0x0000, NULL, NULL, &nv_crtc->cursor.nvbo);

	if (!ret) {

		ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);

		ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM, false);

		if (!ret) {

			ret = nouveau_bo_map(nv_crtc->cursor.nvbo);

			if (ret)

drivers/gpu/drm/nouveau/dispnv04/overlay.c

+2 −2
Original line number Diff line number Diff line
@@ -126,7 +126,7 @@ nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, 
			return -ERANGE;

	}



	ret = nouveau_bo_pin(nv_fb->nvbo, TTM_PL_FLAG_VRAM);

	ret = nouveau_bo_pin(nv_fb->nvbo, TTM_PL_FLAG_VRAM, false);

	if (ret)

		return ret;
@@ -373,7 +373,7 @@ nv04_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, 
	if (crtc_w < src_w || crtc_h < src_h)

		return -ERANGE;



	ret = nouveau_bo_pin(nv_fb->nvbo, TTM_PL_FLAG_VRAM);

	ret = nouveau_bo_pin(nv_fb->nvbo, TTM_PL_FLAG_VRAM, false);

	if (ret)

		return ret;

drivers/gpu/drm/nouveau/nouveau_abi16.c

+1 −1
Original line number Diff line number Diff line
@@ -308,7 +308,7 @@ nouveau_abi16_ioctl_channel_alloc(ABI16_IOCTL_ARGS) 
	ret = nouveau_gem_new(dev, PAGE_SIZE, 0, NOUVEAU_GEM_DOMAIN_GART,

			      0, 0, &chan->ntfy);

	if (ret == 0)

		ret = nouveau_bo_pin(chan->ntfy, TTM_PL_FLAG_TT);

		ret = nouveau_bo_pin(chan->ntfy, TTM_PL_FLAG_TT, false);

	if (ret)

		goto done;

drivers/gpu/drm/nouveau/nouveau_bo.c

+32 −7
Original line number Diff line number Diff line
@@ -310,26 +310,49 @@ nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t type, uint32_t busy) 
}



int

nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t memtype)

nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t memtype, bool contig)

{

	struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);

	struct ttm_buffer_object *bo = &nvbo->bo;

	bool force = false, evict = false;

	int ret;



	ret = ttm_bo_reserve(bo, false, false, false, NULL);

	if (ret)

		return ret;



	if (nvbo->pin_refcnt && !(memtype & (1 << bo->mem.mem_type))) {

		NV_ERROR(drm, "bo %p pinned elsewhere: 0x%08x vs 0x%08x\n", bo,

	if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA &&

	    memtype == TTM_PL_FLAG_VRAM && contig) {

		if (nvbo->tile_flags & NOUVEAU_GEM_TILE_NONCONTIG) {

			if (bo->mem.mem_type == TTM_PL_VRAM) {

				struct nouveau_mem *mem = bo->mem.mm_node;

				if (!list_is_singular(&mem->regions))

					evict = true;

			}

			nvbo->tile_flags &= ~NOUVEAU_GEM_TILE_NONCONTIG;

			force = true;

		}

	}



	if (nvbo->pin_refcnt) {

		if (!(memtype & (1 << bo->mem.mem_type)) || evict) {

			NV_ERROR(drm, "bo %p pinned elsewhere: "

				      "0x%08x vs 0x%08x\n", bo,

				 1 << bo->mem.mem_type, memtype);

		ret = -EINVAL;

			ret = -EBUSY;

		}

		nvbo->pin_refcnt++;

		goto out;

	}



	if (nvbo->pin_refcnt++)

	if (evict) {

		nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_TT, 0);

		ret = nouveau_bo_validate(nvbo, false, false);

		if (ret)

			goto out;

	}



	nvbo->pin_refcnt++;

	nouveau_bo_placement_set(nvbo, memtype, 0);



	/* drop pin_refcnt temporarily, so we don't trip the assertion
@@ -354,6 +377,8 @@ nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t memtype) 
	}



out:

	if (force && ret)

		nvbo->tile_flags |= NOUVEAU_GEM_TILE_NONCONTIG;

	ttm_bo_unreserve(bo);

	return ret;

}

drivers/gpu/drm/nouveau/nouveau_bo.h

+1 −1
Original line number Diff line number Diff line
@@ -73,7 +73,7 @@ int nouveau_bo_new(struct drm_device *, int size, int align, u32 flags, 
		    u32 tile_mode, u32 tile_flags, struct sg_table *sg,

		    struct reservation_object *robj,

		    struct nouveau_bo **);

int  nouveau_bo_pin(struct nouveau_bo *, u32 flags);

int  nouveau_bo_pin(struct nouveau_bo *, u32 flags, bool contig);

int  nouveau_bo_unpin(struct nouveau_bo *);

int  nouveau_bo_map(struct nouveau_bo *);

void nouveau_bo_unmap(struct nouveau_bo *);