Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit abd14cc0 authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by Ralf Baechle
Browse files

[MIPS] DBAu1xx0 code style cleanup



Fix several errors and warnings given by checkpatch.pl:

- macros with complex values not enclosed in parentheses;

- leading spaces instead of tabs;

- printk() without KERN_* facility level;

- using simple_strtol() where strict_strtol() could be used;

- line over 80 characters.

In addition to these changes, also do the following:

- initialize variable instead of assigning value later where it makes sense;

- insert spaces between operator and its operands, also remove excess spaces
  there;

- remove unneeded numeric literal type casts;

- remove needless parentheses;

- remove space after the type cast's closing parenthesis;

- insert missing space before closing brace in the array initializers;

- replace spaces after the macro name with tabs in the #define directives;

- remove excess tabs after the macro name in the #define directives;

- fix typos/errors, capitalize acronyms, etc. in the comments;

- make the multi-line comment style consistent with the kernel style elsewhere
  by adding empty first/last line;

- update MontaVista copyright;

- remove Pete Popov's old email address...

Signed-off-by: default avatarSergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent a9633279
Loading
Loading
Loading
Loading
+4 −4
Original line number Diff line number Diff line
#
#  Copyright 2000 MontaVista Software Inc.
#  Author: MontaVista Software, Inc.
#     	ppopov@mvista.com or source@mvista.com
#  Copyright 2000, 2008 MontaVista Software Inc.
#  Author: MontaVista Software, Inc. <source@mvista.com>
#
# Makefile for the Alchemy Semiconductor DBAu1xx0 boards.
#
# Makefile for the Alchemy Semiconductor Db1x00 board.

lib-y := init.o board_setup.o irqmap.o
+30 −31
Original line number Diff line number Diff line
@@ -3,9 +3,8 @@
 * BRIEF MODULE DESCRIPTION
 *	Alchemy Db1x00 board setup.
 *
 * Copyright 2000 MontaVista Software Inc.
 * Author: MontaVista Software, Inc.
 *         	ppopov@mvista.com or source@mvista.com
 * Copyright 2000, 2008 MontaVista Software Inc.
 * Author: MontaVista Software, Inc. <source@mvista.com>
 *
 *  This program is free software; you can redistribute  it and/or modify it
 *  under  the terms of  the GNU General  Public License as published by the
@@ -37,22 +36,21 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;

void board_reset(void)
{
	/* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
	/* Hit BCSR.SW_RESET[RESET] */
	bcsr->swreset = 0x0000;
}

void __init board_setup(void)
{
	u32 pin_func;
	u32 pin_func = 0;

	pin_func = 0;
	/* not valid for 1550 */

#if defined(CONFIG_IRDA) && (defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100))
	/* set IRFIRSEL instead of GPIO15 */
	pin_func = au_readl(SYS_PINFUNC) | (u32)((1<<8));
	/* Not valid for Au1550 */
#if defined(CONFIG_IRDA) && \
   (defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100))
	/* Set IRFIRSEL instead of GPIO15 */
	pin_func = au_readl(SYS_PINFUNC) | SYS_PF_IRF;
	au_writel(pin_func, SYS_PINFUNC);
	/* power off until the driver is in use */
	/* Power off until the driver is in use */
	bcsr->resets &= ~BCSR_RESETS_IRDA_MODE_MASK;
	bcsr->resets |=  BCSR_RESETS_IRDA_MODE_OFF;
	au_sync();
@@ -60,26 +58,27 @@ void __init board_setup(void)
	bcsr->pcmcia = 0x0000; /* turn off PCMCIA power */

#ifdef CONFIG_MIPS_MIRAGE
	/* enable GPIO[31:0] inputs */
	/* Enable GPIO[31:0] inputs */
	au_writel(0, SYS_PININPUTEN);

	/* GPIO[20] is output, tristate the other input primary GPIO's */
	au_writel((u32)(~(1<<20)), SYS_TRIOUTCLR);
	/* GPIO[20] is output, tristate the other input primary GPIOs */
	au_writel(~(1 << 20), SYS_TRIOUTCLR);

	/* set GPIO[210:208] instead of SSI_0 */
	pin_func = au_readl(SYS_PINFUNC) | (u32)(1);
	/* Set GPIO[210:208] instead of SSI_0 */
	pin_func = au_readl(SYS_PINFUNC) | SYS_PF_S0;

	/* set GPIO[215:211] for LED's */
	pin_func |= (u32)((5<<2));
	/* Set GPIO[215:211] for LEDs */
	pin_func |= 5 << 2;

	/* set GPIO[214:213] for more LED's */
	pin_func |= (u32)((5<<12));
	/* Set GPIO[214:213] for more LEDs */
	pin_func |= 5 << 12;

	/* set GPIO[207:200] instead of PCMCIA/LCD */
	pin_func |= (u32)((3<<17));
	/* Set GPIO[207:200] instead of PCMCIA/LCD */
	pin_func |= SYS_PF_LCD | SYS_PF_PC;
	au_writel(pin_func, SYS_PINFUNC);

	/* Enable speaker amplifier.  This should
	/*
	 * Enable speaker amplifier.  This should
	 * be part of the audio driver.
	 */
	au_writel(au_readl(GPIO2_DIR) | 0x200, GPIO2_DIR);
@@ -89,21 +88,21 @@ void __init board_setup(void)
	au_sync();

#ifdef CONFIG_MIPS_DB1000
    printk("AMD Alchemy Au1000/Db1000 Board\n");
	printk(KERN_INFO "AMD Alchemy Au1000/Db1000 Board\n");
#endif
#ifdef CONFIG_MIPS_DB1500
    printk("AMD Alchemy Au1500/Db1500 Board\n");
	printk(KERN_INFO "AMD Alchemy Au1500/Db1500 Board\n");
#endif
#ifdef CONFIG_MIPS_DB1100
    printk("AMD Alchemy Au1100/Db1100 Board\n");
	printk(KERN_INFO "AMD Alchemy Au1100/Db1100 Board\n");
#endif
#ifdef CONFIG_MIPS_BOSPORUS
    printk("AMD Alchemy Bosporus Board\n");
	printk(KERN_INFO "AMD Alchemy Bosporus Board\n");
#endif
#ifdef CONFIG_MIPS_MIRAGE
    printk("AMD Alchemy Mirage Board\n");
	printk(KERN_INFO "AMD Alchemy Mirage Board\n");
#endif
#ifdef CONFIG_MIPS_DB1550
    printk("AMD Alchemy Au1550/Db1550 Board\n");
	printk(KERN_INFO "AMD Alchemy Au1550/Db1550 Board\n");
#endif
}
+5 −6
Original line number Diff line number Diff line
@@ -2,9 +2,8 @@
 * BRIEF MODULE DESCRIPTION
 *	PB1000 board setup
 *
 * Copyright 2001 MontaVista Software Inc.
 * Author: MontaVista Software, Inc.
 *         	ppopov@mvista.com or source@mvista.com
 * Copyright 2001, 2008 MontaVista Software Inc.
 * Author: MontaVista Software, Inc. <source@mvista.com>
 *
 *  This program is free software; you can redistribute  it and/or modify it
 *  under  the terms of  the GNU General  Public License as published by the
@@ -58,6 +57,6 @@ void __init prom_init(void)
	if (!memsize_str)
		memsize = 0x04000000;
	else
		memsize = simple_strtol(memsize_str, NULL, 0);
		memsize = strict_strtol(memsize_str, 0, NULL);
	add_memory_region(0, memsize, BOOT_MEM_RAM);
}
+42 −41
Original line number Diff line number Diff line
/*
 * AMD Alchemy DB1x00 Reference Boards
 * AMD Alchemy DBAu1x00 Reference Boards
 *
 * Copyright 2001 MontaVista Software Inc.
 * Author: MontaVista Software, Inc.
 *         	ppopov@mvista.com or source@mvista.com
 * Copyright 2001, 2008 MontaVista Software Inc.
 * Author: MontaVista Software, Inc. <source@mvista.com>
 * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
 *
 * ########################################################################
@@ -50,8 +49,8 @@
#endif

/*
 * Overlay data structure of the Db1x00 board registers.
 * Registers located at physical 0E0000xx, KSEG1 0xAE0000xx
 * Overlay data structure of the DBAu1x00 board registers.
 * Registers are located at physical 0E0000xx, KSEG1 0xAE0000xx.
 */
typedef volatile struct
{
@@ -138,7 +137,7 @@ typedef volatile struct

#define BCSR_SWRESET_RESET		0x0080

/* PCMCIA Db1x00 specific defines */
/* PCMCIA DBAu1x00 specific defines */
#define PCMCIA_MAX_SOCK  1
#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1)

@@ -146,10 +145,11 @@ typedef volatile struct
#define SET_VCC_VPP(VCC, VPP, SLOT)\
	((((VCC) << 2) | ((VPP) << 0)) << ((SLOT) * 8))

/* SD controller macros */
/*
 * Detect card.
 * SD controller macros
 */

/* Detect card. */
#define mmc_card_inserted(_n_, _res_) \
	do { \
		BCSR * const bcsr = (BCSR *)0xAE000000; \
@@ -190,10 +190,12 @@ typedef volatile struct
	} while (0)


/* NAND defines */
/* Timing values as described in databook, * ns value stripped of
/*
 * NAND defines
 *
 * Timing values as described in databook, * ns value stripped of the
 * lower 2 bits.
 * These defines are here rather than an SOC1550 generic file because
 * These defines are here rather than an Au1550 generic file because
 * the parts chosen on another board may be different and may require
 * different timings.
 */
@@ -208,16 +210,15 @@ typedef volatile struct
#define NAND_T_SU_SHIFT		8
#define NAND_T_WH_SHIFT		12

#define NAND_TIMING	((NAND_T_H   & 0xF)	<< NAND_T_H_SHIFT)   | \
#define NAND_TIMING	(((NAND_T_H   & 0xF) << NAND_T_H_SHIFT)   | \
			 ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
			 ((NAND_T_SU  & 0xF) << NAND_T_SU_SHIFT)  | \
			((NAND_T_WH  & 0xF)	<< NAND_T_WH_SHIFT)
			 ((NAND_T_WH  & 0xF) << NAND_T_WH_SHIFT))
#define NAND_CS 	1

/* should be done by yamon */
/* Should be done by YAMON */
#define NAND_STCFG	0x00400005 /* 8-bit NAND */
#define NAND_STTIME	0x00007774 /* valid for 396 MHz SD=2 only */
#define NAND_STADDR	0x12000FFF /* physical address 0x20000000 */

#endif /* __ASM_DB1X00_H */
+11 −11

File changed.

Contains only whitespace changes.