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Commit aae65596 authored by Alexander Graf's avatar Alexander Graf
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KVM: PPC: MPIC: Reset IRQ source private members 



When we reset the in-kernel MPIC controller, we forget to reset some hidden
state such as destmask and output. This state is usually set when the guest
writes to the IDR register for a specific IRQ line.

To make sure we stay in sync and don't forget hidden state, treat reset of
the IDR register as a simple write of the IDR register. That automatically
updates all the hidden state as well.

Reported-by: default avatarPaul Janzen <pcj@pauljanzen.org>
Signed-off-by: default avatarAlexander Graf <agraf@suse.de>
parent 42188365

arch/powerpc/kvm/mpic.c

+4 −1
Original line number Diff line number Diff line
@@ -126,6 +126,8 @@ static int openpic_cpu_write_internal(void *opaque, gpa_t addr, 
				      u32 val, int idx);

static int openpic_cpu_read_internal(void *opaque, gpa_t addr,

				     u32 *ptr, int idx);

static inline void write_IRQreg_idr(struct openpic *opp, int n_IRQ,

				    uint32_t val);



enum irq_type {

	IRQ_TYPE_NORMAL = 0,
@@ -528,7 +530,6 @@ static void openpic_reset(struct openpic *opp) 
	/* Initialise IRQ sources */

	for (i = 0; i < opp->max_irq; i++) {

		opp->src[i].ivpr = opp->ivpr_reset;

		opp->src[i].idr = opp->idr_reset;



		switch (opp->src[i].type) {

		case IRQ_TYPE_NORMAL:
@@ -543,6 +544,8 @@ static void openpic_reset(struct openpic *opp) 
		case IRQ_TYPE_FSLSPECIAL:

			break;

		}



		write_IRQreg_idr(opp, i, opp->idr_reset);

	}

	/* Initialise IRQ destinations */

	for (i = 0; i < MAX_CPU; i++) {