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Commit a9eb4f6d authored by Matt Fleming's avatar Matt Fleming Committed by Paul Mundt
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sh: Flush ITLB too in PTEAEX's flush_tlb_page() 



flush_tlb_page() can be used to flush TLB entries that map executable
pages. Therefore, we need to ensure that the ITLB is also flushed in
local_flush_tlb_page().

Signed-off-by: default avatarMatt Fleming <matt@console-pimps.org>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 685abecf

arch/sh/include/cpu-sh4/cpu/mmu_context.h

+2 −0
Original line number Diff line number Diff line
@@ -19,6 +19,8 @@ 


#define MMUCR		0xFF000010	/* MMU Control Register */



#define MMU_ITLB_ADDRESS_ARRAY  0xF2000000

#define MMU_ITLB_ADDRESS_ARRAY2	0xF2800000

#define MMU_UTLB_ADDRESS_ARRAY	0xF6000000

#define MMU_UTLB_ADDRESS_ARRAY2	0xF6800000

#define MMU_PAGE_ASSOC_BIT	0x80

arch/sh/mm/tlb-pteaex.c

+2 −0
Original line number Diff line number Diff line
@@ -73,5 +73,7 @@ void local_flush_tlb_one(unsigned long asid, unsigned long page) 
	jump_to_uncached();

	__raw_writel(page, MMU_UTLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT);

	__raw_writel(asid, MMU_UTLB_ADDRESS_ARRAY2 | MMU_PAGE_ASSOC_BIT);

	__raw_writel(page, MMU_ITLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT);

	__raw_writel(asid, MMU_ITLB_ADDRESS_ARRAY2 | MMU_PAGE_ASSOC_BIT);

	back_to_cached();

}