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Commit a904f5f9 authored by Catalin Marinas's avatar Catalin Marinas Committed by Russell King
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ARM: 6870/1: The mandatory barrier rmb() must be a dsb() in for device accesses 



Since mandatory barriers may be used (explicitly or implicitly via readl
etc.) to ensure the ordering between Device and Normal memory accesses,
a DMB is not enough. This patch converts it to a DSB.

Cc: Colin Cross <ccross@android.com>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 2af68df0

arch/arm/include/asm/system.h

+1 −1
Original line number Diff line number Diff line
@@ -159,7 +159,7 @@ extern unsigned int user_debug; 
#include <mach/barriers.h>

#elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP)

#define mb()		do { dsb(); outer_sync(); } while (0)

#define rmb()		dmb()

#define rmb()		dsb()

#define wmb()		mb()

#else

#include <asm/memory.h>

arch/arm/mach-realview/include/mach/barriers.h

+1 −1
Original line number Diff line number Diff line
@@ -4,5 +4,5 @@ 
 * operation to deadlock the system.

 */

#define mb()		dsb()

#define rmb()		dmb()

#define rmb()		dsb()

#define wmb()		mb()

arch/arm/mach-tegra/include/mach/barriers.h

+1 −1
Original line number Diff line number Diff line
@@ -23,7 +23,7 @@ 


#include <asm/outercache.h>



#define rmb()		dmb()

#define rmb()		dsb()

#define wmb()		do { dsb(); outer_sync(); } while (0)

#define mb()		wmb()