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Commit a85feb8c authored by Gary Zambrano's avatar Gary Zambrano Committed by David S. Miller
Browse files

[TG3]: WoL fixes. 



Change TG3_FLAG_SERDES_WOL_CAP to TG3_FLAG_WOL_CAP to make it easier
to manage WoL.  This flag is now used consistently during ethtool WoL
setup and power setting changes.

Signed-off-by: default avatarGary Zambrano <zambrano@broadcom.com>
Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent aaf84465

drivers/net/tg3.c

+15 −10
Original line number Diff line number Diff line
@@ -1300,9 +1300,11 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state) 
			msleep(1);

		}

	}

	if (tp->tg3_flags & TG3_FLAG_WOL_CAP)

		tg3_write_mem(tp, NIC_SRAM_WOL_MBOX, WOL_SIGNATURE |

						     WOL_DRV_STATE_SHUTDOWN |

					     WOL_DRV_WOL | WOL_SET_MAGIC_PKT);

						     WOL_DRV_WOL |

						     WOL_SET_MAGIC_PKT);



	pci_read_config_word(tp->pdev, pm + PCI_PM_PMC, &power_caps);
@@ -8034,7 +8036,10 @@ static void tg3_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 
{

	struct tg3 *tp = netdev_priv(dev);



	if (tp->tg3_flags & TG3_FLAG_WOL_CAP)

		wol->supported = WAKE_MAGIC;

	else

		wol->supported = 0;

	wol->wolopts = 0;

	if (tp->tg3_flags & TG3_FLAG_WOL_ENABLE)

		wol->wolopts = WAKE_MAGIC;
@@ -8048,8 +8053,7 @@ static int tg3_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 
	if (wol->wolopts & ~WAKE_MAGIC)

		return -EINVAL;

	if ((wol->wolopts & WAKE_MAGIC) &&

	    tp->tg3_flags2 & TG3_FLG2_ANY_SERDES &&

	    !(tp->tg3_flags & TG3_FLAG_SERDES_WOL_CAP))

	    !(tp->tg3_flags & TG3_FLAG_WOL_CAP))

		return -EINVAL;



	spin_lock_bh(&tp->lock);
@@ -10001,8 +10005,8 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp) 
	tp->phy_id = PHY_ID_INVALID;

	tp->led_ctrl = LED_CTRL_MODE_PHY_1;



	/* Assume an onboard device by default.  */

	tp->tg3_flags |= TG3_FLAG_EEPROM_WRITE_PROT;

	/* Assume an onboard device and WOL capable by default.  */

	tp->tg3_flags |= TG3_FLAG_EEPROM_WRITE_PROT | TG3_FLAG_WOL_CAP;



	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {

		if (!(tr32(PCIE_TRANSACTION_CFG) & PCIE_TRANS_CFG_LOM)) {
@@ -10125,8 +10129,9 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp) 
			if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS)

				tp->tg3_flags2 |= TG3_FLG2_ASF_NEW_HANDSHAKE;

		}

		if (nic_cfg & NIC_SRAM_DATA_CFG_FIBER_WOL)

			tp->tg3_flags |= TG3_FLAG_SERDES_WOL_CAP;

		if (tp->tg3_flags2 & TG3_FLG2_ANY_SERDES &&

		    !(nic_cfg & NIC_SRAM_DATA_CFG_FIBER_WOL))

			tp->tg3_flags &= ~TG3_FLAG_WOL_CAP;



		if (cfg2 & (1 << 17))

			tp->tg3_flags2 |= TG3_FLG2_CAPACITIVE_COUPLING;

drivers/net/tg3.h

+1 −1
Original line number Diff line number Diff line
@@ -2215,7 +2215,7 @@ struct tg3 { 
#define TG3_FLAG_PCI_32BIT		0x00080000

#define TG3_FLAG_SRAM_USE_CONFIG	0x00100000

#define TG3_FLAG_TX_RECOVERY_PENDING	0x00200000

#define TG3_FLAG_SERDES_WOL_CAP		0x00400000

#define TG3_FLAG_WOL_CAP		0x00400000

#define TG3_FLAG_JUMBO_RING_ENABLE	0x00800000

#define TG3_FLAG_10_100_ONLY		0x01000000

#define TG3_FLAG_PAUSE_AUTONEG		0x02000000