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Commit a80c69fc authored by Daniel Vetter's avatar Daniel Vetter
Browse files

Merge branch 'topic/atomic-conversion' into drm-intel-next-queued 



The i915 atomic conversion is a real beast and it's not getting easier
wrangling in a separate branch. I'm might be regretting this, but
right after vacation nothing can burst my little bubble here!

Signed-off-by: default avatarDaniel Vetter <daniel.vetter@intel.com>
parents 49e4d842 c0165304

drivers/gpu/drm/i915/i915_debugfs.c

+37 −13
Original line number Diff line number Diff line
@@ -2783,13 +2783,16 @@ static int i915_display_info(struct seq_file *m, void *unused) 
	seq_printf(m, "---------\n");

	for_each_intel_crtc(dev, crtc) {

		bool active;

		struct intel_crtc_state *pipe_config;

		int x, y;



		pipe_config = to_intel_crtc_state(crtc->base.state);



		seq_printf(m, "CRTC %d: pipe: %c, active=%s (size=%dx%d)\n",

			   crtc->base.base.id, pipe_name(crtc->pipe),

			   yesno(crtc->active), crtc->config->pipe_src_w,

			   crtc->config->pipe_src_h);

		if (crtc->active) {

			   yesno(pipe_config->base.active),

			   pipe_config->pipe_src_w, pipe_config->pipe_src_h);

		if (pipe_config->base.active) {

			intel_crtc_info(m, crtc);



			active = cursor_position(dev, crtc->pipe, &x, &y);
@@ -3030,7 +3033,7 @@ static void drrs_status_per_crtc(struct seq_file *m, 


	seq_puts(m, "\n\n");



	if (intel_crtc->config->has_drrs) {

	if (to_intel_crtc_state(intel_crtc->base.state)->has_drrs) {

		struct intel_panel *panel;



		mutex_lock(&drrs->mutex);
@@ -3082,7 +3085,7 @@ static int i915_drrs_status(struct seq_file *m, void *unused) 
	for_each_intel_crtc(dev, intel_crtc) {

		drm_modeset_lock(&intel_crtc->base.mutex, NULL);



		if (intel_crtc->active) {

		if (intel_crtc->base.state->active) {

			active_crtc_cnt++;

			seq_printf(m, "\nCRTC %d:  ", active_crtc_cnt);
@@ -3624,22 +3627,33 @@ static void hsw_trans_edp_pipe_A_crc_wa(struct drm_device *dev) 
	struct drm_i915_private *dev_priv = dev->dev_private;

	struct intel_crtc *crtc =

		to_intel_crtc(dev_priv->pipe_to_crtc_mapping[PIPE_A]);

	struct intel_crtc_state *pipe_config;



	drm_modeset_lock_all(dev);

	pipe_config = to_intel_crtc_state(crtc->base.state);



	/*

	 * If we use the eDP transcoder we need to make sure that we don't

	 * bypass the pfit, since otherwise the pipe CRC source won't work. Only

	 * relevant on hsw with pipe A when using the always-on power well

	 * routing.

	 */

	if (crtc->config->cpu_transcoder == TRANSCODER_EDP &&

	    !crtc->config->pch_pfit.enabled) {

		crtc->config->pch_pfit.force_thru = true;

	if (pipe_config->cpu_transcoder == TRANSCODER_EDP &&

	    !pipe_config->pch_pfit.enabled) {

		bool active = pipe_config->base.active;



		if (active) {

			intel_crtc_control(&crtc->base, false);

			pipe_config = to_intel_crtc_state(crtc->base.state);

		}



		pipe_config->pch_pfit.force_thru = true;



		intel_display_power_get(dev_priv,

					POWER_DOMAIN_PIPE_PANEL_FITTER(PIPE_A));



		intel_crtc_reset(crtc);

		if (active)

			intel_crtc_control(&crtc->base, true);

	}

	drm_modeset_unlock_all(dev);

}
@@ -3649,6 +3663,7 @@ static void hsw_undo_trans_edp_pipe_A_crc_wa(struct drm_device *dev) 
	struct drm_i915_private *dev_priv = dev->dev_private;

	struct intel_crtc *crtc =

		to_intel_crtc(dev_priv->pipe_to_crtc_mapping[PIPE_A]);

	struct intel_crtc_state *pipe_config;



	drm_modeset_lock_all(dev);

	/*
@@ -3657,13 +3672,22 @@ static void hsw_undo_trans_edp_pipe_A_crc_wa(struct drm_device *dev) 
	 * relevant on hsw with pipe A when using the always-on power well

	 * routing.

	 */

	if (crtc->config->pch_pfit.force_thru) {

		crtc->config->pch_pfit.force_thru = false;

	pipe_config = to_intel_crtc_state(crtc->base.state);

	if (pipe_config->pch_pfit.force_thru) {

		bool active = pipe_config->base.active;



		if (active) {

			intel_crtc_control(&crtc->base, false);

			pipe_config = to_intel_crtc_state(crtc->base.state);

		}



		intel_crtc_reset(crtc);

		pipe_config->pch_pfit.force_thru = false;



		intel_display_power_put(dev_priv,

					POWER_DOMAIN_PIPE_PANEL_FITTER(PIPE_A));



		if (active)

			intel_crtc_control(&crtc->base, true);

	}

	drm_modeset_unlock_all(dev);

}
@@ -3779,7 +3803,7 @@ static int pipe_crc_set_source(struct drm_device *dev, enum pipe pipe, 
				 pipe_name(pipe));



		drm_modeset_lock(&crtc->base.mutex, NULL);

		if (crtc->active)

		if (crtc->base.state->active)

			intel_wait_for_vblank(dev, pipe);

		drm_modeset_unlock(&crtc->base.mutex);

drivers/gpu/drm/i915/i915_drv.c

+1 −3
Original line number Diff line number Diff line
@@ -601,7 +601,6 @@ static int bxt_resume_prepare(struct drm_i915_private *dev_priv); 
static int i915_drm_suspend(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct drm_crtc *crtc;

	pci_power_t opregion_target_state;

	int error;
@@ -632,8 +631,7 @@ static int i915_drm_suspend(struct drm_device *dev) 
	 * for _thaw. Also, power gate the CRTC power wells.

	 */

	drm_modeset_lock_all(dev);

	for_each_crtc(dev, crtc)

		intel_crtc_control(crtc, false);

	intel_display_suspend(dev);

	drm_modeset_unlock_all(dev);



	intel_dp_mst_suspend(dev);

drivers/gpu/drm/i915/i915_drv.h

+0 −2
Original line number Diff line number Diff line
@@ -376,7 +376,6 @@ struct intel_shared_dpll_config { 


struct intel_shared_dpll {

	struct intel_shared_dpll_config config;

	struct intel_shared_dpll_config *new_config;



	int active; /* count of number of active CRTCs (i.e. DPMS on) */

	bool on; /* is the PLL actually active? Disabled during modeset */
@@ -631,7 +630,6 @@ struct drm_i915_display_funcs { 
				  struct intel_crtc_state *crtc_state);

	void (*crtc_enable)(struct drm_crtc *crtc);

	void (*crtc_disable)(struct drm_crtc *crtc);

	void (*off)(struct drm_crtc *crtc);

	void (*audio_codec_enable)(struct drm_connector *connector,

				   struct intel_encoder *encoder,

				   struct drm_display_mode *mode);

drivers/gpu/drm/i915/i915_irq.c

+6 −7
Original line number Diff line number Diff line
@@ -564,8 +564,7 @@ static u32 i915_get_vblank_counter(struct drm_device *dev, int pipe) 
	u32 high1, high2, low, pixel, vbl_start, hsync_start, htotal;

	struct intel_crtc *intel_crtc =

		to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);

	const struct drm_display_mode *mode =

		&intel_crtc->config->base.adjusted_mode;

	const struct drm_display_mode *mode = &intel_crtc->base.hwmode;



	htotal = mode->crtc_htotal;

	hsync_start = mode->crtc_hsync_start;
@@ -620,7 +619,7 @@ static int __intel_get_crtc_scanline(struct intel_crtc *crtc) 
{

	struct drm_device *dev = crtc->base.dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	const struct drm_display_mode *mode = &crtc->config->base.adjusted_mode;

	const struct drm_display_mode *mode = &crtc->base.hwmode;

	enum pipe pipe = crtc->pipe;

	int position, vtotal;
@@ -647,14 +646,14 @@ static int i915_get_crtc_scanoutpos(struct drm_device *dev, int pipe, 
	struct drm_i915_private *dev_priv = dev->dev_private;

	struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];

	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

	const struct drm_display_mode *mode = &intel_crtc->config->base.adjusted_mode;

	const struct drm_display_mode *mode = &intel_crtc->base.hwmode;

	int position;

	int vbl_start, vbl_end, hsync_start, htotal, vtotal;

	bool in_vbl = true;

	int ret = 0;

	unsigned long irqflags;



	if (!intel_crtc->active) {

	if (WARN_ON(!mode->crtc_clock)) {

		DRM_DEBUG_DRIVER("trying to get scanoutpos for disabled "

				 "pipe %c\n", pipe_name(pipe));

		return 0;
@@ -796,7 +795,7 @@ static int i915_get_vblank_timestamp(struct drm_device *dev, int pipe, 
		return -EINVAL;

	}



	if (!crtc->state->enable) {

	if (!crtc->hwmode.crtc_clock) {

		DRM_DEBUG_KMS("crtc %d is disabled\n", pipe);

		return -EBUSY;

	}
@@ -805,7 +804,7 @@ static int i915_get_vblank_timestamp(struct drm_device *dev, int pipe, 
	return drm_calc_vbltimestamp_from_scanoutpos(dev, pipe, max_error,

						     vblank_time, flags,

						     crtc,

						     &to_intel_crtc(crtc)->config->base.adjusted_mode);

						     &crtc->hwmode);

}



static bool intel_hpd_irq_event(struct drm_device *dev,

drivers/gpu/drm/i915/intel_atomic.c

+60 −36
Original line number Diff line number Diff line
@@ -129,6 +129,8 @@ int intel_atomic_commit(struct drm_device *dev, 
			struct drm_atomic_state *state,

			bool async)

{

	struct drm_crtc_state *crtc_state;

	struct drm_crtc *crtc;

	int ret;

	int i;
@@ -142,48 +144,19 @@ int intel_atomic_commit(struct drm_device *dev, 
		return ret;



	/* Point of no return */

	drm_atomic_helper_swap_state(dev, state);



	/*

	 * FIXME:  The proper sequence here will eventually be:

	 *

	 * drm_atomic_helper_swap_state(dev, state)

	 * drm_atomic_helper_commit_modeset_disables(dev, state);

	 * drm_atomic_helper_commit_planes(dev, state);

	 * drm_atomic_helper_commit_modeset_enables(dev, state);

	 * drm_atomic_helper_wait_for_vblanks(dev, state);

	 * drm_atomic_helper_cleanup_planes(dev, state);

	 * drm_atomic_state_free(state);

	 *

	 * once we have full atomic modeset.  For now, just manually update

	 * plane states to avoid clobbering good states with dummy states

	 * while nuclear pageflipping.

	 */

	for (i = 0; i < dev->mode_config.num_total_plane; i++) {

		struct drm_plane *plane = state->planes[i];



		if (!plane)

			continue;



		plane->state->state = state;

		swap(state->plane_states[i], plane->state);

		plane->state->state = NULL;

	}



	/* swap crtc_scaler_state */

	for (i = 0; i < dev->mode_config.num_crtc; i++) {

		struct drm_crtc *crtc = state->crtcs[i];

		if (!crtc) {

			continue;

		}



		to_intel_crtc(crtc)->config->scaler_state =

			to_intel_crtc_state(state->crtc_states[i])->scaler_state;

	for_each_crtc_in_state(state, crtc, crtc_state, i) {

		to_intel_crtc(crtc)->config = to_intel_crtc_state(crtc->state);



		if (INTEL_INFO(dev)->gen >= 9)

			skl_detach_scalers(to_intel_crtc(crtc));



		drm_atomic_helper_commit_planes_on_crtc(crtc_state);

	}



	drm_atomic_helper_commit_planes(dev, state);

	/* FIXME: This function should eventually call __intel_set_mode when needed */



	drm_atomic_helper_wait_for_vblanks(dev, state);

	drm_atomic_helper_cleanup_planes(dev, state);

	drm_atomic_state_free(state);
@@ -421,3 +394,54 @@ int intel_atomic_setup_scalers(struct drm_device *dev, 


	return 0;

}



static void

intel_atomic_duplicate_dpll_state(struct drm_i915_private *dev_priv,

				  struct intel_shared_dpll_config *shared_dpll)

{

	enum intel_dpll_id i;



	/* Copy shared dpll state */

	for (i = 0; i < dev_priv->num_shared_dpll; i++) {

		struct intel_shared_dpll *pll = &dev_priv->shared_dplls[i];



		shared_dpll[i] = pll->config;

	}

}



struct intel_shared_dpll_config *

intel_atomic_get_shared_dpll_state(struct drm_atomic_state *s)

{

	struct intel_atomic_state *state = to_intel_atomic_state(s);



	WARN_ON(!drm_modeset_is_locked(&s->dev->mode_config.connection_mutex));



	if (!state->dpll_set) {

		state->dpll_set = true;



		intel_atomic_duplicate_dpll_state(to_i915(s->dev),

						  state->shared_dpll);

	}



	return state->shared_dpll;

}



struct drm_atomic_state *

intel_atomic_state_alloc(struct drm_device *dev)

{

	struct intel_atomic_state *state = kzalloc(sizeof(*state), GFP_KERNEL);



	if (!state || drm_atomic_state_init(dev, &state->base) < 0) {

		kfree(state);

		return NULL;

	}



	return &state->base;

}



void intel_atomic_state_clear(struct drm_atomic_state *s)

{

	struct intel_atomic_state *state = to_intel_atomic_state(s);

	drm_atomic_state_default_clear(&state->base);

	state->dpll_set = false;

}