Merge tag 'v3.18-rc2' into asoc-sgtl5000

the same bits set to 1. TTBRx selection is given by bit 63 of the

virtual address. The swapper_pg_dir contains only kernel (global)

mappings while the user pgd contains only user (non-global) mappings.

The swapper_pgd_dir address is written to TTBR1 and never written to

The swapper_pg_dir address is written to TTBR1 and never written to

TTBR0.

* Generic Mailbox Controller and client driver bindings

Generic binding to provide a way for Mailbox controller drivers to

assign appropriate mailbox channel to client drivers.

* Mailbox Controller

Required property:

- #mbox-cells: Must be at least 1. Number of cells in a mailbox

		specifier.

Example:

	mailbox: mailbox {

		...

		#mbox-cells = <1>;

	};

* Mailbox Client

Required property:

- mboxes: List of phandle and mailbox channel specifiers.

Optional property:

- mbox-names: List of identifier strings for each mailbox channel

		required by the client. The use of this property

		is discouraged in favor of using index in list of

		'mboxes' while requesting a mailbox. Instead the

		platforms may define channel indices, in DT headers,

		to something legible.

Example:

	pwr_cntrl: power {

		...

		mbox-names = "pwr-ctrl", "rpc";

		mboxes = <&mailbox 0

			&mailbox 1>;

	};

Freescale FlexTimer Module (FTM) PWM controller

The same FTM PWM device can have a different endianness on different SoCs. The

device tree provides a property to describing this so that an operating system

device driver can handle all variants of the device. Refer to the table below

for the endianness of the FTM PWM block as integrated into the existing SoCs:

	SoC     | FTM-PWM endianness

	--------+-------------------

	Vybrid  | LE

	LS1     | BE

	LS2     | LE

Please see ../regmap/regmap.txt for more detail about how to specify endian

modes in device tree.

Required properties:

- compatible: Should be "fsl,vf610-ftm-pwm".

- reg: Physical base address and length of the controller's registers

- pinctrl-names: Must contain a "default" entry.

- pinctrl-NNN: One property must exist for each entry in pinctrl-names.

  See pinctrl/pinctrl-bindings.txt for details of the property values.

- big-endian: Boolean property, required if the FTM PWM registers use a big-

  endian rather than little-endian layout.

Example:

			<&clks VF610_CLK_FTM0_EXT_FIX_EN>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_pwm0_1>;

		big-endian;

};

   "rockchip,vop-pwm": found integrated in VOP on RK3288 SoC

 - reg: physical base address and length of the controller's registers

 - clocks: phandle and clock specifier of the PWM reference clock

 - #pwm-cells: should be 2. See pwm.txt in this directory for a

   description of the cell format.

 - #pwm-cells: must be 2 (rk2928) or 3 (rk3288). See pwm.txt in this directory

   for a description of the cell format.

Example:

* Temperature Monitor (TEMPMON) on Freescale i.MX SoCs

Required properties:

- compatible : "fsl,imx6q-thermal"

- compatible : "fsl,imx6q-tempmon" for i.MX6Q, "fsl,imx6sx-tempmon" for i.MX6SX.

  i.MX6SX has two more IRQs than i.MX6Q, one is IRQ_LOW and the other is IRQ_PANIC,

  when temperature is below than low threshold, IRQ_LOW will be triggered, when temperature

  is higher than panic threshold, system will auto reboot by SRC module.

- fsl,tempmon : phandle pointer to system controller that contains TEMPMON

  control registers, e.g. ANATOP on imx6q.

- fsl,tempmon-data : phandle pointer to fuse controller that contains TEMPMON