Loading arch/sh/kernel/timers/timer-tmu.c +2 −56 Original line number Diff line number Diff line Loading @@ -111,60 +111,6 @@ static struct irqaction tmu_irq = { .mask = CPU_MASK_NONE, }; /* * Hah! We'll see if this works (switching from usecs to nsecs). */ static unsigned long tmu_timer_get_frequency(void) { u32 freq; struct timespec ts1, ts2; unsigned long diff_nsec; unsigned long factor; /* Setup the timer: We don't want to generate interrupts, just * have it count down at its natural rate. */ ctrl_outb(0, TMU_TSTR); #if !defined(CONFIG_CPU_SUBTYPE_SH7300) && !defined(CONFIG_CPU_SUBTYPE_SH7760) ctrl_outb(TMU_TOCR_INIT, TMU_TOCR); #endif ctrl_outw(TMU0_TCR_CALIB, TMU0_TCR); ctrl_outl(0xffffffff, TMU0_TCOR); ctrl_outl(0xffffffff, TMU0_TCNT); rtc_sh_get_time(&ts2); do { rtc_sh_get_time(&ts1); } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec); /* actually start the timer */ ctrl_outb(TMU_TSTR_INIT, TMU_TSTR); do { rtc_sh_get_time(&ts2); } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec); freq = 0xffffffff - ctrl_inl(TMU0_TCNT); if (ts2.tv_nsec < ts1.tv_nsec) { ts2.tv_nsec += 1000000000; ts2.tv_sec--; } diff_nsec = (ts2.tv_sec - ts1.tv_sec) * 1000000000 + (ts2.tv_nsec - ts1.tv_nsec); /* this should work well if the RTC has a precision of n Hz, where * n is an integer. I don't think we have to worry about the other * cases. */ factor = (1000000000 + diff_nsec/2) / diff_nsec; if (factor * diff_nsec > 1100000000 || factor * diff_nsec < 900000000) panic("weird RTC (diff_nsec %ld)", diff_nsec); return freq * factor; } static void tmu_clk_init(struct clk *clk) { u8 divisor = TMU0_TCR_INIT & 0x7; Loading Loading @@ -232,12 +178,12 @@ struct sys_timer_ops tmu_timer_ops = { .init = tmu_timer_init, .start = tmu_timer_start, .stop = tmu_timer_stop, .get_frequency = tmu_timer_get_frequency, #ifndef CONFIG_GENERIC_TIME .get_offset = tmu_timer_get_offset, #endif }; struct sys_timer tmu_timer = { .name = "tmu", .ops = &tmu_timer_ops, }; include/asm-sh/timer.h +0 −6 Original line number Diff line number Diff line Loading @@ -11,7 +11,6 @@ struct sys_timer_ops { #ifndef CONFIG_GENERIC_TIME unsigned long (*get_offset)(void); #endif unsigned long (*get_frequency)(void); }; struct sys_timer { Loading @@ -33,11 +32,6 @@ static inline unsigned long get_timer_offset(void) } #endif static inline unsigned long get_timer_frequency(void) { return sys_timer->ops->get_frequency(); } /* arch/sh/kernel/timers/timer.c */ struct sys_timer *get_sys_timer(void); Loading Loading
arch/sh/kernel/timers/timer-tmu.c +2 −56 Original line number Diff line number Diff line Loading @@ -111,60 +111,6 @@ static struct irqaction tmu_irq = { .mask = CPU_MASK_NONE, }; /* * Hah! We'll see if this works (switching from usecs to nsecs). */ static unsigned long tmu_timer_get_frequency(void) { u32 freq; struct timespec ts1, ts2; unsigned long diff_nsec; unsigned long factor; /* Setup the timer: We don't want to generate interrupts, just * have it count down at its natural rate. */ ctrl_outb(0, TMU_TSTR); #if !defined(CONFIG_CPU_SUBTYPE_SH7300) && !defined(CONFIG_CPU_SUBTYPE_SH7760) ctrl_outb(TMU_TOCR_INIT, TMU_TOCR); #endif ctrl_outw(TMU0_TCR_CALIB, TMU0_TCR); ctrl_outl(0xffffffff, TMU0_TCOR); ctrl_outl(0xffffffff, TMU0_TCNT); rtc_sh_get_time(&ts2); do { rtc_sh_get_time(&ts1); } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec); /* actually start the timer */ ctrl_outb(TMU_TSTR_INIT, TMU_TSTR); do { rtc_sh_get_time(&ts2); } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec); freq = 0xffffffff - ctrl_inl(TMU0_TCNT); if (ts2.tv_nsec < ts1.tv_nsec) { ts2.tv_nsec += 1000000000; ts2.tv_sec--; } diff_nsec = (ts2.tv_sec - ts1.tv_sec) * 1000000000 + (ts2.tv_nsec - ts1.tv_nsec); /* this should work well if the RTC has a precision of n Hz, where * n is an integer. I don't think we have to worry about the other * cases. */ factor = (1000000000 + diff_nsec/2) / diff_nsec; if (factor * diff_nsec > 1100000000 || factor * diff_nsec < 900000000) panic("weird RTC (diff_nsec %ld)", diff_nsec); return freq * factor; } static void tmu_clk_init(struct clk *clk) { u8 divisor = TMU0_TCR_INIT & 0x7; Loading Loading @@ -232,12 +178,12 @@ struct sys_timer_ops tmu_timer_ops = { .init = tmu_timer_init, .start = tmu_timer_start, .stop = tmu_timer_stop, .get_frequency = tmu_timer_get_frequency, #ifndef CONFIG_GENERIC_TIME .get_offset = tmu_timer_get_offset, #endif }; struct sys_timer tmu_timer = { .name = "tmu", .ops = &tmu_timer_ops, };
include/asm-sh/timer.h +0 −6 Original line number Diff line number Diff line Loading @@ -11,7 +11,6 @@ struct sys_timer_ops { #ifndef CONFIG_GENERIC_TIME unsigned long (*get_offset)(void); #endif unsigned long (*get_frequency)(void); }; struct sys_timer { Loading @@ -33,11 +32,6 @@ static inline unsigned long get_timer_offset(void) } #endif static inline unsigned long get_timer_frequency(void) { return sys_timer->ops->get_frequency(); } /* arch/sh/kernel/timers/timer.c */ struct sys_timer *get_sys_timer(void); Loading