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Commit a6f3eefa authored by Baruch Siach's avatar Baruch Siach Committed by Max Filippov
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xtensa: enable HAVE_PERF_EVENTS



This allows the perf tool to monitor kernel tracepoint events.

Signed-off-by: default avatarBaruch Siach <baruch@tkos.co.il>
Signed-off-by: default avatarMax Filippov <jcmvbkbc@gmail.com>
parent 6cb97111
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@@ -19,6 +19,7 @@ config XTENSA
	select HAVE_OPROFILE
	select HAVE_FUNCTION_TRACER
	select HAVE_IRQ_TIME_ACCOUNTING
	select HAVE_PERF_EVENTS
	help
	  Xtensa processors are 32-bit RISC machines designed by Tensilica
	  primarily for embedded systems.  These processors are both
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#ifndef __ASM_XTENSA_PERF_EVENT_H
#define __ASM_XTENSA_PERF_EVENT_H

#endif /* __ASM_XTENSA_PERF_EVENT_H */