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Commit a67b20d2 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux 

Pull drm fixes from Dave Airlie:
 "I've been a bit slow gathering these:

   - drm/mst: one mutex leak in a fail path

   - radeon: two oops fixes, one dpm fix

   - i915: one messy set of fixes, where we revert the original fix, and
           pull back the proper set of fixes from -next on top.

   - nouveau: one fix for an illegal buffer placement.

  Doesn't look too bad, hopefully shouldn't be too much more"

* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
  drm/nouveau/gem: return only valid domain when there's only one
  drm: fix mutex leak in drm_dp_get_mst_branch_device
  drm/amdgpu: add missing dpm check for KV dpm late init
  drm/amdgpu/dpm: don't add pwm attributes if DPM is disabled
  drm/radeon/dpm: don't add pwm attributes if DPM is disabled
  drm/i915: Add primary plane to mask if it's visible
  drm/i915: Move sprite/cursor plane disable to intel_sanitize_crtc()
  drm/i915: Assign hwmode after encoder state readout
  Revert "drm/i915: Add primary plane to mask if it's visible"
  drm/i915: Deny wrapping an userptr into a framebuffer
  drm/i915: Enable DPLL VGA mode before P1/P2 divider write
  drm/i915: Restore lost DPLL register write on gen2-4
  drm/i915: Flush pipecontrol post-sync writes
  drm/i915: Fix kerneldoc for i915_gem_shrink_all
parents 8a70dd26 c50f13f9

drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c

+6 −2
Original line number Diff line number Diff line
@@ -294,10 +294,14 @@ static umode_t hwmon_attributes_visible(struct kobject *kobj, 
	struct amdgpu_device *adev = dev_get_drvdata(dev);

	umode_t effective_mode = attr->mode;



	/* Skip limit attributes if DPM is not enabled */

	/* Skip attributes if DPM is not enabled */

	if (!adev->pm.dpm_enabled &&

	    (attr == &sensor_dev_attr_temp1_crit.dev_attr.attr ||

	     attr == &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr))

	     attr == &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr ||

	     attr == &sensor_dev_attr_pwm1.dev_attr.attr ||

	     attr == &sensor_dev_attr_pwm1_enable.dev_attr.attr ||

	     attr == &sensor_dev_attr_pwm1_max.dev_attr.attr ||

	     attr == &sensor_dev_attr_pwm1_min.dev_attr.attr))

		return 0;



	/* Skip fan attributes if fan is not present */

drivers/gpu/drm/amd/amdgpu/kv_dpm.c

+3 −0
Original line number Diff line number Diff line
@@ -2997,6 +2997,9 @@ static int kv_dpm_late_init(void *handle) 
	struct amdgpu_device *adev = (struct amdgpu_device *)handle;

	int ret;



	if (!amdgpu_dpm)

		return 0;



	/* init the sysfs and debugfs files late */

	ret = amdgpu_pm_sysfs_init(adev);

	if (ret)

drivers/gpu/drm/drm_dp_mst_topology.c

+4 −3
Original line number Diff line number Diff line
@@ -1194,17 +1194,18 @@ static struct drm_dp_mst_branch *drm_dp_get_mst_branch_device(struct drm_dp_mst_ 


		list_for_each_entry(port, &mstb->ports, next) {

			if (port->port_num == port_num) {

				if (!port->mstb) {

				mstb = port->mstb;

				if (!mstb) {

					DRM_ERROR("failed to lookup MSTB with lct %d, rad %02x\n", lct, rad[0]);

					return NULL;

					goto out;

				}



				mstb = port->mstb;

				break;

			}

		}

	}

	kref_get(&mstb->kref);

out:

	mutex_unlock(&mgr->lock);

	return mstb;

}

drivers/gpu/drm/i915/i915_gem_shrinker.c

+1 −1
Original line number Diff line number Diff line
@@ -143,7 +143,7 @@ i915_gem_shrink(struct drm_i915_private *dev_priv, 
}



/**

 * i915_gem_shrink - Shrink buffer object caches completely

 * i915_gem_shrink_all - Shrink buffer object caches completely

 * @dev_priv: i915 device

 *

 * This is a simple wraper around i915_gem_shrink() to aggressively shrink all

drivers/gpu/drm/i915/i915_gem_userptr.c

+4 −1
Original line number Diff line number Diff line
@@ -804,7 +804,10 @@ static const struct drm_i915_gem_object_ops i915_gem_userptr_ops = { 
 * Also note, that the object created here is not currently a "first class"

 * object, in that several ioctls are banned. These are the CPU access

 * ioctls: mmap(), pwrite and pread. In practice, you are expected to use

 * direct access via your pointer rather than use those ioctls.

 * direct access via your pointer rather than use those ioctls. Another

 * restriction is that we do not allow userptr surfaces to be pinned to the

 * hardware and so we reject any attempt to create a framebuffer out of a

 * userptr.

 *

 * If you think this is a good interface to use to pass GPU memory between

 * drivers, please use dma-buf instead. In fact, wherever possible use